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Message-ID: <41ac24c4-6c95-d946-2679-c1be2cb20536@intel.com>
Date: Thu, 17 Nov 2022 15:54:21 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Marco Elver <elver@...gle.com>
Cc: Naresh Kamboju <naresh.kamboju@...aro.org>,
Peter Zijlstra <peterz@...radead.org>,
kasan-dev <kasan-dev@...glegroups.com>, X86 ML <x86@...nel.org>,
open list <linux-kernel@...r.kernel.org>,
linux-mm <linux-mm@...ck.org>, regressions@...ts.linux.dev,
lkft-triage@...ts.linaro.org,
Andrew Morton <akpm@...ux-foundation.org>,
Alexander Potapenko <glider@...gle.com>
Subject: Re: WARNING: CPU: 0 PID: 0 at arch/x86/include/asm/kfence.h:46
kfence_protect
On 11/17/22 15:23, Marco Elver wrote:
> Yes - it's the 'level != PG_LEVEL_4K'.
That plus the bisect made it pretty easy to find, thanks for the effort!
Could you double-check that the attached patch fixes it? It seemed to
for me.
The issue was that the new "No changes, easy!" check in the suspect
commit didn't check the cpa->force_split option. It didn't split down
to 4k and then all hell broke loose.
Oh, and I totally misread the kfence ability to tolerate partial TLB
flushes. Sorry for the noise there!
View attachment "kfence.patch" of type "text/x-patch" (505 bytes)
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