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Message-ID: <429fd44a-34e1-be31-2c6c-c1106e3c98cb@kernel.org>
Date: Thu, 17 Nov 2022 14:50:47 +0200
From: Georgi Djakov <djakov@...nel.org>
To: Abel Vesa <abel.vesa@...aro.org>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Manivannan Sadhasivam <mani@...nel.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Rob Herring <robh+dt@...nel.org>, kw@...ux.com,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-pci@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: PCI: qcom: Add SM8550 to binding
Hi Abel,
On 16.11.22 14:35, Abel Vesa wrote:
> Add the SM8550 platform to the binding.
>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---
> .../devicetree/bindings/pci/qcom,pcie.yaml | 96 +++++++++++++++++++
> 1 file changed, 96 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 54f07852d279..efa01a8411c4 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -34,6 +34,8 @@ properties:
> - qcom,pcie-sm8250
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> + - qcom,pcie-sm8550-pcie0
> + - qcom,pcie-sm8550-pcie1
> - qcom,pcie-ipq6018
>
> reg:
> @@ -92,6 +94,10 @@ properties:
> power-domains:
> maxItems: 1
>
> + enable-gpios:
> + description: GPIO controlled connection to ENABLE# signal
> + maxItems: 1
> +
> perst-gpios:
> description: GPIO controlled connection to PERST# signal
> maxItems: 1
> @@ -187,6 +193,8 @@ allOf:
> - qcom,pcie-sm8250
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> + - qcom,pcie-sm8550-pcie0
> + - qcom,pcie-sm8550-pcie1
> then:
> properties:
> reg:
> @@ -601,6 +609,92 @@ allOf:
> items:
> - const: pci # PCIe core reset
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,pcie-sm8550-pcie0
> + then:
> + properties:
> + clocks:
> + minItems: 11
> + maxItems: 11
> + clock-names:
> + items:
> + - const: pipe # PIPE clock
> + - const: pipe_mux # PIPE MUX
> + - const: phy_pipe # PIPE output clock
> + - const: ref # REFERENCE clock
> + - const: aux # Auxiliary clock
> + - const: cfg # Configuration clock
> + - const: bus_master # Master AXI clock
> + - const: bus_slave # Slave AXI clock
> + - const: slave_q2a # Slave Q2A clock
> + - const: ddrss_sf_tbu # PCIe SF TBU clock
> + - const: aggre0 # Aggre NoC PCIe0 AXI clock
> + interconnects:
> + maxItems: 1
> + interconnect-names:
> + const: icc_path
> + iommus:
> + maxItems: 1
> + iommu-map:
> + maxItems: 2
> + power-domains:
> + maxItems: 1
> + power-domain-names:
> + const: gdsc
> + resets:
> + maxItems: 1
> + reset-names:
> + items:
> + - const: pci # PCIe core reset
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,pcie-sm8550-pcie1
> + then:
> + properties:
> + clocks:
> + minItems: 12
> + maxItems: 12
> + clock-names:
> + items:
> + - const: pipe # PIPE clock
> + - const: pipe_mux # PIPE MUX
> + - const: phy_pipe # PIPE output clock
> + - const: ref # REFERENCE clock
> + - const: aux # Auxiliary clock
> + - const: cfg # Configuration clock
> + - const: bus_master # Master AXI clock
> + - const: bus_slave # Slave AXI clock
> + - const: slave_q2a # Slave Q2A clock
> + - const: ddrss_sf_tbu # PCIe SF TBU clock
> + - const: aggre1 # Aggre NoC PCIe1 AXI clock
> + - const: cnoc_pcie_sf_axi # Config NoC PCIe1 AXI clock
> + interconnects:
> + maxItems: 1
> + interconnect-names:
> + const: icc_path
The name of the path is too generic. Probably something like "pcie-mem" or "pcie-ddr" would be
more appropriate to indicate that this is for requesting bandwidth on the path between PCIE and
DDR memory.
Thanks,
Georgi
> + iommus:
> + maxItems: 1
> + iommu-map:
> + maxItems: 2
> + power-domains:
> + maxItems: 1
> + power-domain-names:
> + const: gdsc
> + resets:
> + maxItems: 2
> + reset-names:
> + items:
> + - const: pci # PCIe core reset
> + - const: pcie_1_link_down_reset # PCIe link down reset
> +
> - if:
> properties:
> compatible:
> @@ -672,6 +766,8 @@ allOf:
> - qcom,pcie-sm8250
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> + - qcom,pcie-sm8550-pcie0
> + - qcom,pcie-sm8550-pcie1
> then:
> oneOf:
> - properties:
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