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Message-ID: <CAL_JsqJOvqdP5d52QkE=3qN5hXSxk-+OR-O4SS06Ex=4iZFaVA@mail.gmail.com>
Date: Thu, 17 Nov 2022 07:14:57 -0600
From: Rob Herring <robh@...nel.org>
To: "Larson, Bradley" <Bradley.Larson@....com>
Cc: Brad Larson <brad@...sando.io>,
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Subject: Re: [PATCH v8 06/17] dt-bindings: mfd: amd,pensando-elbasr: Add AMD
Pensando Elba System Resource chip
On Wed, Nov 16, 2022 at 6:41 PM Larson, Bradley <Bradley.Larson@....com> wrote:
>
> [AMD Official Use Only - General]
>
> From: Rob Herring <robh@...nel.org>
> Sent: Wednesday, November 16, 2022 2:30 PM
>
> >> v8:
> >> - Apply review request changes and picked the two unique examples
> >> for the 4 chip-selects as one has the reset control support and
> >> the other an interrupt. Missed the --in-reply-to in git
> >> send-email for v7, included in this update.
> >
> >No, you haven't. By default in git, you don't have to do anything. See
> >--thread and --no-chain-reply-to options. If you are messing with
> >--in-reply-to, you are doing it wrong.
> >
> >Please resend the whole series properly threaded.
>
> Will resend the series
>
> >> diff --git a/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml b/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml
> >> new file mode 100644
> >> index 000000000000..622c93402a86
> >> --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml
> >> @@ -0,0 +1,60 @@
> ...
> >> +
> >> +title: AMD Pensando Elba SoC Resource Controller
> >> +
> >> +description: |
> >> + AMD Pensando Elba SoC Resource Controller functions are
> >> + accessed with four chip-selects. Reset control is on CS0.
> >
> > One device with 4 chip-selects? Then I'd expect 'reg = <0 1 2 3>;'
> >
> > Hard to say more because I don't have the whole thread nor remember what
> > exactly we discussed before. That was 100s of bindings ago...
>
> I agree and the example for v7 had all 4 chip-selects shown.
That is not what I said. Look at 'reg' above again. You have 1 device,
but you have 4 nodes which looks like separate 4 devices. The
exception would be if what's on each chip select is independent from
each other.
Describe what your h/w has/is/does so we can provide better guidance.
Rob
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