linux-kernel - Re: [PATCH] platform/x86/amd: pmc: Add a workaround for an s0i3 issue on Cezanne

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Date:   Thu, 17 Nov 2022 15:05:51 +0100
From:   Hans de Goede <hdegoede@...hat.com>
To:     Mario Limonciello <mario.limonciello@....com>,
        Shyam Sundar S K <Shyam-sundar.S-k@....com>
Cc:     "Mahapatra, Rajib" <Rajib.Mahapatra@....com>,
        Raul Rangel <rrangel@...omium.org>,
        Mark Gross <markgross@...nel.org>,
        platform-driver-x86@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] platform/x86/amd: pmc: Add a workaround for an s0i3 issue
 on Cezanne

Hi Mario,

On 11/16/22 16:43, Mario Limonciello wrote:
> Cezanne platforms under the right circumstances have a synchronization
> problem where attempting to enter s2idle may fail if the x86 cores are
> put into HLT before hardware resume from the previous attempt has
> completed.
> 
> To avoid this issue add a 10-20ms delay before entering s2idle another
> time. This workaround will only be applied on interrupts that wake the
> hardware but don't break the s2idle loop.
> 
> Cc: "Mahapatra, Rajib" <Rajib.Mahapatra@....com>
> Cc: "Raul Rangel" <rrangel@...omium.org>
> Signed-off-by: Mario Limonciello <mario.limonciello@....com>

Thank you for your patch, I've applied this patch to my review-hans 
branch:
https://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git/log/?h=review-hans

Please let me know if it important to get this as a fix into 6.1,
I wasn't really planning on doing any more fixes pull-reqs for 6.1,
but I can do one if necessary.

Once I've run some tests on this branch the patches there will be
added to the platform-drivers-x86/for-next branch and eventually
will be included in the pdx86 pull-request to Linus for the next
merge-window.

Regards,

Hans


> ---
>  drivers/platform/x86/amd/pmc.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/platform/x86/amd/pmc.c b/drivers/platform/x86/amd/pmc.c
> index ef4ae977b8e0..439d282aafd1 100644
> --- a/drivers/platform/x86/amd/pmc.c
> +++ b/drivers/platform/x86/amd/pmc.c
> @@ -739,8 +739,14 @@ static void amd_pmc_s2idle_prepare(void)
>  static void amd_pmc_s2idle_check(void)
>  {
>  	struct amd_pmc_dev *pdev = &pmc;
> +	struct smu_metrics table;
>  	int rc;
>  
> +	/* CZN: Ensure that future s0i3 entry attempts at least 10ms passed */
> +	if (pdev->cpu_id == AMD_CPU_ID_CZN && !get_metrics_table(pdev, &table) &&
> +	    table.s0i3_last_entry_status)
> +		usleep_range(10000, 20000);
> +
>  	/* Dump the IdleMask before we add to the STB */
>  	amd_pmc_idlemask_read(pdev, pdev->dev, NULL);
>