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Message-ID: <Y3et+VpYh+L7N8SL@google.com>
Date:   Fri, 18 Nov 2022 16:08:25 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     Jiaxi Chen <jiaxi.chen@...ux.intel.com>
Cc:     kvm@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
        bp@...en8.de, dave.hansen@...ux.intel.com, x86@...nel.org,
        hpa@...or.com, pbonzini@...hat.com, ndesaulniers@...gle.com,
        alexandre.belloni@...tlin.com, peterz@...radead.org,
        jpoimboe@...nel.org, chang.seok.bae@...el.com,
        pawan.kumar.gupta@...ux.intel.com, babu.moger@....com,
        jmattson@...gle.com, sandipan.das@....com, tony.luck@...el.com,
        sathyanarayanan.kuppuswamy@...ux.intel.com, fenghua.yu@...el.com,
        keescook@...omium.org, nathan@...nel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 3/6] x86: KVM: Advertise AVX-IFMA CPUID to user space

On Fri, Nov 18, 2022, Jiaxi Chen wrote:
> AVX-IFMA is a new instruction in the latest Intel platform Sierra
> Forest. This instruction packed multiplies unsigned 52-bit integers and
> adds the low/high 52-bit products to Qword Accumulators.
> 
> The bit definition:
> CPUID.(EAX=7,ECX=1):EAX[bit 23]
> 
> This CPUID is exposed to user space. Besides, there is no other VMX
> control for this instruction.
> 
> Signed-off-by: Jiaxi Chen <jiaxi.chen@...ux.intel.com>
> ---
>  arch/x86/include/asm/cpufeatures.h | 1 +
>  arch/x86/kvm/cpuid.c               | 4 ++--
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index df4a7f7505a9..159f8b9898bf 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -310,6 +310,7 @@
>  #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
>  #define X86_FEATURE_CMPCCXADD           (12*32+ 7) /* CMPccXADD instructions */
>  #define X86_FEATURE_AMX_FP16		(12*32+21) /* AMX fp16 Support */
> +#define X86_FEATURE_AVX_IFMA            (12*32+23) /* Support for VPMADD52[H,L]UQ */
>  
>  /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
>  #define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 2a334d4cd04e..5726afb2d14c 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -657,8 +657,8 @@ void kvm_set_cpu_caps(void)
>  		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
>  
>  	kvm_cpu_cap_mask(CPUID_7_1_EAX,
> -		F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(AMX_FP16)
> -	);
> +		F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(AMX_FP16) |
> +		F(AVX_IFMA));

Please keep the terminating paranthesis+semicolon on a separate line.  KVM isn't
100% consistent (as usual), but I would rather "fix" the cases that don't put
the terminators on their own line. 

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