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Message-ID: <CAJM55Z9bJqpEGbbx1=EBXhmhigxuHw=ObBdTJ7xy+QY=pTJyoQ@mail.gmail.com>
Date: Fri, 18 Nov 2022 19:36:11 +0100
From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
To: Walker Chen <walker.chen@...rfivetech.com>
Cc: linux-riscv@...ts.infradead.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor.dooley@...rochip.com>,
"Rafael J . Wysocki" <rafael@...nel.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 4/4] riscv: dts: starfive: add power controller node
On Fri, 18 Nov 2022 at 14:35, Walker Chen <walker.chen@...rfivetech.com> wrote:
>
> This adds the power controller node for the Starfive JH7110 SoC.
> The pmu needs to be used by other modules such as ISP, VPU, etc.
>
> Signed-off-by: Walker Chen <walker.chen@...rfivetech.com>
Hi Walker,
You called the driver jh71xx which suggests it also applies to the
jh7100. Are you missing a node in the jh7100 device tree?
> ---
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index c22e8f1d2640..fa7b60b82d71 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -356,6 +356,13 @@
> #gpio-cells = <2>;
> };
>
> + pwrc: power-controller@...30000 {
> + compatible = "starfive,jh7110-pmu";
> + reg = <0x0 0x17030000 0x0 0x10000>;
> + interrupts = <111>;
> + #power-domain-cells = <1>;
> + };
> +
> uart0: serial@...00000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x0 0x10000000 0x0 0x10000>;
> --
> 2.17.1
>
>
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