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Date: Fri, 18 Nov 2022 20:01:24 +0100 From: Frank Wunderlich <linux@...web.de> To: linux-mediatek@...ts.infradead.org Cc: Frank Wunderlich <frank-w@...lic-files.de>, Ryder Lee <ryder.lee@...iatek.com>, Jianjun Wang <jianjun.wang@...iatek.com>, Bjorn Helgaas <bhelgaas@...gle.com>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Chunfeng Yun <chunfeng.yun@...iatek.com>, Kishon Vijay Abraham I <kishon@...com>, Vinod Koul <vkoul@...nel.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Matthias Brugger <matthias.bgg@...il.com>, Paolo Abeni <pabeni@...hat.com>, Lorenzo Bianconi <lorenzo@...nel.org>, Bo Jiao <Bo.Jiao@...iatek.com>, linux-pci@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-phy@...ts.infradead.org, linux-usb@...r.kernel.org, Sam Shih <sam.shih@...iatek.com>, Jieyy Yang <jieyy.yang@...iatek.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com> Subject: [PATCH v6 09/11] arm64: dts: mt7986: add pcie related device nodes From: Sam Shih <sam.shih@...iatek.com> This patch adds PCIe support for MT7986. Signed-off-by: Jieyy Yang <jieyy.yang@...iatek.com> Signed-off-by: Sam Shih <sam.shih@...iatek.com> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com> --- changes compared to sams original version: - add clock-names to pcie node - update clocks to new binding --- bindings-patches: https://patchwork.kernel.org/project/linux-mediatek/list/?series=690172 --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 16 ++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 52 ++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 4c0b879d6703..8eaee9ff1822 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -93,6 +93,15 @@ &mmc0 { non-removable; no-sd; no-sdio; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { status = "okay"; }; @@ -155,6 +164,13 @@ conf-rst { }; }; + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_wake", "pcie_pereset"; + }; + }; + spi_flash_pins: spi-flash-pins { mux { function = "spi"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index b3ad8978b563..b310abc02dcc 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/mt7986-clk.h> #include <dt-bindings/reset/mt7986-resets.h> +#include <dt-bindings/phy/phy.h> / { interrupt-parent = <&gic>; @@ -319,6 +320,57 @@ mmc0: mmc@...30000 { status = "disabled"; }; + pcie: pcie@...80000 { + compatible = "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0x00 0x11280000 0x00 0x4000>; + reg-names = "pcie-mac"; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0x00 0x20000000 0x00 + 0x20000000 0x00 0x10000000>; + clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, + <&infracfg CLK_INFRA_IPCIE_CK>, + <&infracfg CLK_INFRA_IPCIER_CK>, + <&infracfg CLK_INFRA_IPCIEB_CK>; + clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m"; + status = "disabled"; + + phys = <&pcie_port PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + pcie_intc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie_phy: t-phy@...00000 { + compatible = "mediatek,mt7986-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + pcie_port: pcie-phy@...00000 { + reg = <0 0x11c00000 0 0x20000>; + clocks = <&clk40m>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + usb_phy: t-phy@...10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; -- 2.34.1
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