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Message-Id: <20221118190126.100895-5-linux@fw-web.de>
Date: Fri, 18 Nov 2022 20:01:19 +0100
From: Frank Wunderlich <linux@...web.de>
To: linux-mediatek@...ts.infradead.org
Cc: Frank Wunderlich <frank-w@...lic-files.de>,
Ryder Lee <ryder.lee@...iatek.com>,
Jianjun Wang <jianjun.wang@...iatek.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Paolo Abeni <pabeni@...hat.com>,
Lorenzo Bianconi <lorenzo@...nel.org>,
Bo Jiao <Bo.Jiao@...iatek.com>, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-phy@...ts.infradead.org, linux-usb@...r.kernel.org,
Rob Herring <robh@...nel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
Subject: [PATCH v6 04/11] dt-bindings: PCI: mediatek-gen3: add SoC based clock config
From: Frank Wunderlich <frank-w@...lic-files.de>
The PCIe driver covers different SOC which needing different clock
configs. Define them based on compatible.
Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
Reviewed-by: Rob Herring <robh@...nel.org>
Acked-by: Jianjun Wang <jianjun.wang@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
v2:
- fix typo in mediatek,mt8192-pcie
v3:
- remove contains to match only if compatible is no fallback
tested with series "Add driver nodes for MT8195 SoC" and mt7986
pcie-nodes, dtbs_check is now clean
---
.../bindings/pci/mediatek-pcie-gen3.yaml | 47 ++++++++++++++-----
1 file changed, 35 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index c00be39af64e..5d7369debff2 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -43,9 +43,6 @@ description: |+
each set has its own address for MSI message, and supports 32 MSI vectors
to generate interrupt.
-allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
-
properties:
compatible:
oneOf:
@@ -84,15 +81,7 @@ properties:
maxItems: 6
clock-names:
- items:
- - const: pl_250m
- - const: tl_26m
- - const: tl_96m
- - const: tl_32k
- - const: peri_26m
- - enum:
- - top_133m # for MT8192
- - peri_mem # for MT8188/MT8195
+ maxItems: 6
assigned-clocks:
maxItems: 1
@@ -138,6 +127,40 @@ required:
- '#interrupt-cells'
- interrupt-controller
+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+ - if:
+ properties:
+ compatible:
+ const: mediatek,mt8192-pcie
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: pl_250m
+ - const: tl_26m
+ - const: tl_96m
+ - const: tl_32k
+ - const: peri_26m
+ - const: top_133m
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt8188-pcie
+ - mediatek,mt8195-pcie
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: pl_250m
+ - const: tl_26m
+ - const: tl_96m
+ - const: tl_32k
+ - const: peri_26m
+ - const: peri_mem
+
unevaluatedProperties: false
examples:
--
2.34.1
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