linux-kernel - Re: [PATCH v2 0/5] Basic pinctrl support for StarFive JH7110 RISC-V SoC

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Message-ID: <4db38c2e-49b5-81fc-bfda-bef61860e411@starfivetech.com>
Date:   Fri, 18 Nov 2022 15:17:26 +0800
From:   Hal Feng <hal.feng@...rfivetech.com>
To:     <linux-riscv@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-gpio@...r.kernel.org>
CC:     Conor Dooley <conor@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        "Rob Herring" <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        Jianlong Huang <jianlong.huang@...rfivetech.com>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 0/5] Basic pinctrl support for StarFive JH7110 RISC-V
 SoC

On Fri, 18 Nov 2022 09:11:03 +0800, Hal Feng wrote:
> The original patch series "Basic StarFive JH7110 RISC-V SoC support" [1]
> is split into 3 patch series. They respectively add basic clock&reset,
> pinctrl and device tree support for StarFive JH7110 SoC. These patch
> series are independent, but the Visionfive2 board can boot up successfully

Note that this patch series depends on the patch series [1].

[1] https://lore.kernel.org/all/20221118010627.70576-1-hal.feng@starfivetech.com/

> only if all these patches series applied. This one adds basic pinctrl