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Message-ID: <20221118100800.4950aec0@booty>
Date: Fri, 18 Nov 2022 10:08:00 +0100
From: Luca Ceresoli <luca.ceresoli@...tlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Sowjanya Komatineni <skomatineni@...dia.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Hans Verkuil <hverkuil-cisco@...all.nl>,
Dmitry Osipenko <digetx@...il.com>,
linux-media@...r.kernel.org, linux-tegra@...r.kernel.org,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-staging@...ts.linux.dev,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Richard Leitner <richard.leitner@...data.com>,
Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Subject: Re: [PATCH 01/23] dt-bindings: display: tegra: add bindings for
Tegra20 VIP
Hello Krzysztof,
thanks for the review. I'm glad my error rate on bindings is lower than
it used to be before I attended your ELCE talk! ;)
On Tue, 15 Nov 2022 13:12:44 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> wrote:
> On 09/11/2022 15:18, luca.ceresoli@...tlin.com wrote:
> > From: Luca Ceresoli <luca.ceresoli@...tlin.com>
> >
> > VIP is the parallel video capture component within the video input
> > subsystem of Tegra20 (and other Tegra chips, apparently).
>
> Subject: drop second, redundant "bindings".
>
> >
> > Signed-off-by: Luca Ceresoli <luca.ceresoli@...tlin.com>
> > ---
> > .../display/tegra/nvidia,tegra20-vip.yaml | 64 +++++++++++++++++++
> > MAINTAINERS | 7 ++
> > 2 files changed, 71 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> > new file mode 100644
> > index 000000000000..934dabfd2307
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> > @@ -0,0 +1,64 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NVIDIA Tegra VIP (parallel video capture) controller
> > +
> > +maintainers:
> > + - Luca Ceresoli <luca.ceresoli@...tlin.com>
> > +
> > +properties:
> > + $nodename:
> > + const: vip
>
> No need to enforce names in device schemas, especially that this does
> not look like a generic name.
>
> > +
> > + compatible:
> > + enum:
> > + - nvidia,tegra20-vip
> > +
> > + "#address-cells":
> > + const: 1
> > +
> > + "#size-cells":
> > + const: 0
> > +
> > + channel@0:
>
> Missing description.
OK, I think this should do:
description: parallel video capture interface for the VI
> > + type: object
>
> Do you expect it to grow to more channels?
Not on Tegra20, it has one input only, but for other SoCs it's likely.
Definitely some (including Tegra20 itself) have multiple CSI-2 inputs,
and it's reasonable that this can apply to parallel input too.
Is this enough motivation to make room for more channels, or should I
remove it since I have no plans to introduce support for other Tegra
chips?
> > +
> > + properties:
> > + reg: true
>
> const: 0
>
> > +
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description:
> > + Port receiving the video stream from the sensor
> > +
> > + port@1:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description:
> > + Port sending the video stream to the VI
> > +
> > + required:
> > + - port@0
> > + - port@1
> > +
> > + additionalProperties: false
> > +
> > + required:
> > + - reg
> > + - ports
> > +
> > +unevaluatedProperties: false
> > +
> > +required:
> > + - compatible
> > + - "#address-cells"
> > + - "#size-cells"
> > + - channel@0
> > +
> > +# see nvidia,tegra20-vi.yaml for an example
>
> That file does not have this compatible. At least not on next-20221109.
It's added in patch 2. It's a chicken-egg problem, should I add a third
patch that adds this line only?
ACK for all other comments you wrote.
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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