linux-kernel - Re: [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC

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Message-ID: <Y3dvCPP1g0LzzHFO@spud>
Date:   Fri, 18 Nov 2022 11:39:52 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Hal Feng <hal.feng@...rfivetech.com>
Cc:     linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        Palmer Dabbelt <palmer@...belt.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Ben Dooks <ben.dooks@...ive.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>, Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Linus Walleij <linus.walleij@...aro.org>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive
 JH7110 SoC

On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote:
> On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote:
> > From: Emil Renner Berthing <kernel@...il.dk>
> > 
> > This cache controller is also used on the StarFive JH7110 SoC.
> 
> "... and configured identically to that of the FU740"?
> Anyways,
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>

Actually, after looking at the next patch - why can you not fall back to
the fu740 one since you appear to have the same configuration as it?

> > Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
> > Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> > ---
> >  .../devicetree/bindings/riscv/sifive,ccache0.yaml          | 7 ++++++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> > index bf3f07421f7e..262d1d49ce25 100644
> > --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> > @@ -25,6 +25,7 @@ select:
> >            - sifive,ccache0
> >            - sifive,fu540-c000-ccache
> >            - sifive,fu740-c000-ccache
> > +          - starfive,jh7110-ccache
> >  
> >    required:
> >      - compatible
> > @@ -37,6 +38,7 @@ properties:
> >                - sifive,ccache0
> >                - sifive,fu540-c000-ccache
> >                - sifive,fu740-c000-ccache
> > +              - starfive,jh7110-ccache
> >            - const: cache
> >        - items:
> >            - const: microchip,mpfs-ccache
> > @@ -86,6 +88,7 @@ allOf:
> >              enum:
> >                - sifive,fu740-c000-ccache
> >                - microchip,mpfs-ccache
> > +              - starfive,jh7110-ccache
> >  
> >      then:
> >        properties:
> > @@ -105,7 +108,9 @@ allOf:
> >        properties:
> >          compatible:
> >            contains:
> > -            const: sifive,fu740-c000-ccache
> > +            enum:
> > +              - sifive,fu740-c000-ccache
> > +              - starfive,jh7110-ccache
> >  
> >      then:
> >        properties:
> > -- 
> > 2.38.1
> > 
> > 
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@...ts.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv

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