lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Sun, 20 Nov 2022 01:24:21 +0530
From:   Deepak R Varma <drv@...lo.com>
To:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-staging@...ts.linux.dev, linux-kernel@...r.kernel.org
Cc:     drv@...lo.com
Subject: [PATCH] staging: pi433: set DCC setting to spec recommended value

The DCCFreq value is used to obtain the DC offset canceller cut-off
frequency. Upon device power reset, the bits 7-5 of the RegRxBw register
that represent the DCCFreq setting are set to 0x4, which evaluates the
cut-off frequency to be 1% of RxBw.

In the current implementation, first, there is no configuration variable
defined in the struct pi433_rx_cfg for the user to set this value as
part of the UAPI. Second, the code simply ignores the value of DCC
setting and allows it to never change.

As per the RFM69HCW tech specs, the default value for DCC frequency is
recommended to be 4% of the RxBw; which requires the DCC setting bits
to be set to 010. So allow the DCC setting to change to recommended /
default value for improved rx sensitivity.

Signed-off-by: Deepak R Varma <drv@...lo.com>
---

Please Note: The proposed change is compile tested only. I am unable to perform
device based testing in the absence of the hardware, both the RasPi board and the
Pi433 device. Please let me know if it is necessary for me to test such patches
on the real device myself. I will stop sending the patches till I have the hardware
to test them. Thanks.



 drivers/staging/pi433/rf69.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/staging/pi433/rf69.c b/drivers/staging/pi433/rf69.c
index 8c7fab6a46bb..8468d4717dd0 100644
--- a/drivers/staging/pi433/rf69.c
+++ b/drivers/staging/pi433/rf69.c
@@ -465,6 +465,13 @@ static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg,
 	// read old value
 	bandwidth = rf69_read_reg(spi, reg);

+	/* DCC setting bits [7-5] are set to 0x4 on reset. Since there is no user
+	 * input available in the rx config struct, we should set it to default
+	 * or the recommended value as per the technical specification.
+	 */
+	if ((bandwidth >> 5) == 0x4)
+		bandwidth = bandwidth & BW_DCC_4_PERCENT;
+
 	// "delete" mantisse and exponent = just keep the DCC setting
 	bandwidth = bandwidth & MASK_BW_DCC_FREQ;

--
2.34.1



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ