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Message-ID: <Y3vpT2XoylY4i2kx@spud>
Date: Mon, 21 Nov 2022 21:10:39 +0000
From: Conor Dooley <conor@...nel.org>
To: Palmer Dabbelt <palmer@...osinc.com>
Cc: anup@...infault.org, rafael@...nel.org, daniel.lezcano@...aro.org,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, aou@...s.berkeley.edu,
linux-pm@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux@...osinc.com
Subject: Re: [PATCH] cpuidle: riscv-sbi: Stop using non-retentive suspend
On Mon, Nov 21, 2022 at 12:56:47PM -0800, Palmer Dabbelt wrote:
> From: Palmer Dabbelt <palmer@...osinc.com>
>
> As per [1], whether or not the core can wake up from non-retentive
> suspend is a platform-specific detail. We don't have any way to encode
> that, so just stop using them until we've sorted that out.
For anyone playing along at home, Anup had a proposal for encoding this
information (yoinked from the GH issue below):
https://lore.kernel.org/all/20220727114302.302201-1-apatel@ventanamicro.com/>
> Link: https://github.com/riscv-non-isa/riscv-sbi-doc/issues/98#issuecomment-1288564687
> Fixes: 6abf32f1d9c5 ("cpuidle: Add RISC-V SBI CPU idle driver")
> Signed-off-by: Palmer Dabbelt <palmer@...osinc.com>
>
> ---
>
> This should allow us to revert 232ccac1bd9b ("clocksource/drivers/riscv:
> Events are stopped during CPU suspend"), which fixes suspend on the D1
> but breaks timers everywhere.
FWIW the revert is at:
https://lore.kernel.org/linux-riscv/20221023185444.678573-1-conor@kernel.org/
Commit message is probably a little lacking as I didn't understand the
problem when I wrote it. I'll respin the revert with a tidier message
tomorrow.
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> drivers/cpuidle/cpuidle-riscv-sbi.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c b/drivers/cpuidle/cpuidle-riscv-sbi.c
> index 05fe2902df9a..9d1063a54495 100644
> --- a/drivers/cpuidle/cpuidle-riscv-sbi.c
> +++ b/drivers/cpuidle/cpuidle-riscv-sbi.c
> @@ -214,6 +214,17 @@ static bool sbi_suspend_state_is_valid(u32 state)
> if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT &&
> state < SBI_HSM_SUSPEND_NON_RET_PLATFORM)
> return false;
> +
> + /*
> + * Whether or not RISC-V systems deliver interrupts to harts in a
> + * non-retentive suspend state is a platform-specific detail. This can
> + * leave the hart unable to wake up, so just mark these states as
> + * unsupported until we have a mechanism to expose these
> + * platform-specific details to Linux.
> + */
> + if (state & SBI_HSM_SUSP_NON_RET_BIT)
> + return false;
> +
> return true;
> }
>
> --
> 2.38.1
>
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