lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 21 Nov 2022 14:25:21 +0800
From:   Hal Feng <hal.feng@...rfivetech.com>
To:     Emil Renner Berthing <emil.renner.berthing@...onical.com>
CC:     "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        Conor Dooley <conor@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Stephen Boyd <sboyd@...nel.org>,
        "Michael Turquette" <mturquette@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 01/14] clk: starfive: Factor out common JH7100 and
 JH7110 code

On Sat, 19 Nov 2022 00:22:10 +0800, Emil Renner Berthing wrote:
> On Fri, 18 Nov 2022 at 02:06, Hal Feng <hal.feng@...rfivetech.com> wrote:
> >
> > From: Emil Renner Berthing <kernel@...il.dk>
> >
> > The clock control registers on the StarFive JH7100 and JH7110 work
> > identically, so factor out the code then drivers for the two SoCs
> > can share it without depending on each other. No functional change.
> >
> > Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
> > Co-developed-by: Hal Feng <hal.feng@...rfivetech.com>
> > Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> > ---
> >  MAINTAINERS                                |   2 +-
> >  drivers/clk/starfive/Kconfig               |   5 +
> >  drivers/clk/starfive/Makefile              |   3 +-
> >  drivers/clk/starfive/clk-starfive-jh7100.c | 325 --------------------
> >  drivers/clk/starfive/clk-starfive-jh7100.h |   2 +
> >  drivers/clk/starfive/clk-starfive-jh71x0.c | 333 +++++++++++++++++++++
> >  6 files changed, 343 insertions(+), 327 deletions(-)
> >  create mode 100644 drivers/clk/starfive/clk-starfive-jh71x0.c
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 256f03904987..d43daa89d5f1 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -19602,7 +19602,7 @@ STARFIVE JH7100 CLOCK DRIVERS
> >  M:     Emil Renner Berthing <kernel@...il.dk>
> >  S:     Maintained
> >  F:     Documentation/devicetree/bindings/clock/starfive,jh7100-*.yaml
> > -F:     drivers/clk/starfive/clk-starfive-jh7100*
> > +F:     drivers/clk/starfive/
> 
> When this entry cover all the starfive clock drivers the header should
> also match. Eg.
> STARFIVE CLOCK DRIVERS

OK, will fix it. Ditto for the reset driver.

Best regards,
Hal

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ