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Date: Mon, 21 Nov 2022 11:09:45 +0100 From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> To: Jisheng Zhang <jszhang@...nel.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, Jiri Slaby <jirislaby@...nel.org> Cc: linux-serial@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org Subject: Re: [PATCH 5/7] riscv: dts: bouffalolab: add the bl808 SoC base device tree On 20/11/2022 09:21, Jisheng Zhang wrote: > Add a baisc dtsi for the bouffalolab bl808 SoC. > > Signed-off-by: Jisheng Zhang <jszhang@...nel.org> > --- > arch/riscv/boot/dts/Makefile | 1 + > arch/riscv/boot/dts/bouffalolab/bl808.dtsi | 74 ++++++++++++++++++++++ > 2 files changed, 75 insertions(+) > create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808.dtsi > > diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile > index ff174996cdfd..b525467152b2 100644 > --- a/arch/riscv/boot/dts/Makefile > +++ b/arch/riscv/boot/dts/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > +subdir-y += bouffalolab Nothing to build there, so not yet. Best regards, Krzysztof
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