linux-kernel - Re: [PATCH] soc: mediatek: pm-domains: Fix the power glitch issue

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Date:   Tue, 22 Nov 2022 18:38:48 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Cc:     angelogioacchino.delregno@...labora.com,
        Project_Global_Chrome_Upstream_Group@...iatek.com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        Chun-Jie Chen <chun-jie.chen@...iatek.com>
Subject: Re: [PATCH] soc: mediatek: pm-domains: Fix the power glitch issue



On 14/10/2022 12:20, Allen-KH Cheng wrote:
> From: Chun-Jie Chen <chun-jie.chen@...iatek.com>
> 
> Power reset maybe generate unexpected signal. In order to avoid
> the glitch issue, we need to enable isolation first to guarantee the
> stable signal when power reset is triggered.
> 
> Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
> Signed-off-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
> Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>
> Reviewed-by: Miles Chen <miles.chen@...iatek.com>

Applied to fixes now, thanks!

> ---
>    Resend a PATCH from
> https://patchwork.kernel.org/project/linux-mediatek/patch/20220310011548.2487-1-chun-jie.chen@mediatek.com/
> 
>   [Allen-KH Cheng <allen-kh.cheng@...iatek.com>]
> ---
> ---
>   drivers/soc/mediatek/mtk-pm-domains.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index 09e3c38b8466..474b272f9b02 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -275,9 +275,9 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
>   	clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
>   
>   	/* subsys power off */
> -	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
>   	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
>   	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);
> +	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
>   	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);
>   	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);
>