linux-kernel - Re: [Patch v3 07/14] x86/hyperv: Change vTOM handling to use standard coco mechanisms

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Message-ID: <cff68b1a-c239-4d52-27b0-536079243981@intel.com>
Date:   Tue, 22 Nov 2022 10:30:23 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     "Michael Kelley (LINUX)" <mikelley@...rosoft.com>,
        Borislav Petkov <bp@...en8.de>
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Subject: Re: [Patch v3 07/14] x86/hyperv: Change vTOM handling to use standard
 coco mechanisms

On 11/22/22 10:22, Michael Kelley (LINUX) wrote:
> Anyway, that's where I think this should go. Does it make sense?
> Other thoughts?

I think hard-coding the C-bit behavior and/or position to a vendor was
probably a bad idea.  Even the comment:

u64 cc_mkenc(u64 val)
{
        /*
         * Both AMD and Intel use a bit in the page table to indicate
         * encryption status of the page.
         *
         * - for AMD, bit *set* means the page is encrypted
         * - for Intel *clear* means encrypted.
         */

doesn't make a lot of sense now.  Maybe we should just have a:

	CC_ATTR_ENC_SET

which gets set for the "AMD" behavior and is clear for the "Intel"
behavior.  Hyper-V code running on AMD can set the attribute to get teh
"Intel" behavior.

That sure beats having a Hyper-V vendor.