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Message-ID: <daa2c31b-0fd5-acca-a41f-cc5e407b74b8@starfivetech.com>
Date: Tue, 22 Nov 2022 17:17:57 +0800
From: Hal Feng <hal.feng@...rfivetech.com>
To: Emil Renner Berthing <emil.renner.berthing@...onical.com>
CC: "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Conor Dooley <conor@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Ben Dooks <ben.dooks@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>, Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
"Linus Walleij" <linus.walleij@...aro.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 5/8] soc: sifive: ccache: Add StarFive JH7110 support
On Sat, 19 Nov 2022 01:32:10 +0800, Emil Renner Berthing wrote:
> On Fri, 18 Nov 2022 at 02:17, Hal Feng <hal.feng@...rfivetech.com> wrote:
> >
> > From: Emil Renner Berthing <kernel@...il.dk>
> >
> > This adds support for the StarFive JH7110 SoC which also
> > features this SiFive cache controller.
> >
> > Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
> > Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> > ---
>
> I'm fine with this, but it would be great if you could add the jh7100
> support at the same time like the original patch did.
I think this patch series should only add support for JH7110. Maybe
we can make a new patch series to do this.
Best regards,
Hal
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