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Message-ID: <f794e9fb-7ce0-2649-9839-b9ce36b80d1d@starfivetech.com>
Date:   Wed, 23 Nov 2022 10:11:44 +0800
From:   Walker Chen <walker.chen@...rfivetech.com>
To:     Emil Renner Berthing <emil.renner.berthing@...onical.com>
CC:     <linux-riscv@...ts.infradead.org>, <linux-pm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor.dooley@...rochip.com>,
        "Rafael J . Wysocki" <rafael@...nel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 4/4] riscv: dts: starfive: add power controller node

On 2022/11/19 2:36, Emil Renner Berthing wrote:
> On Fri, 18 Nov 2022 at 14:35, Walker Chen <walker.chen@...rfivetech.com> wrote:
>>
>> This adds the power controller node for the Starfive JH7110 SoC.
>> The pmu needs to be used by other modules such as ISP, VPU, etc.
>>
>> Signed-off-by: Walker Chen <walker.chen@...rfivetech.com>
> 
> Hi Walker,
> 
> You called the driver jh71xx which suggests it also applies to the
> jh7100. Are you missing a node in the jh7100 device tree?

No, there is no power domain controller on the jh7100. Our next generation of chips jh7120 will 
still use this power management unit, so here this driver name is called jh71xx_pmu.c or changed
to jh71xx_power.c , do you think such a name is appropriate ?  
Your reply will be highly appreciated!

> 
>> ---
>>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index c22e8f1d2640..fa7b60b82d71 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -356,6 +356,13 @@
>>                         #gpio-cells = <2>;
>>                 };
>>
>> +               pwrc: power-controller@...30000 {
>> +                       compatible = "starfive,jh7110-pmu";
>> +                       reg = <0x0 0x17030000 0x0 0x10000>;
>> +                       interrupts = <111>;
>> +                       #power-domain-cells = <1>;
>> +               };
>> +
>>                 uart0: serial@...00000 {
>>                         compatible = "snps,dw-apb-uart";
>>                         reg = <0x0 0x10000000 0x0 0x10000>;
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@...ts.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

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