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Message-Id: <20221123142009.594781-3-abel.vesa@linaro.org>
Date: Wed, 23 Nov 2022 16:20:02 +0200
From: Abel Vesa <abel.vesa@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Mike Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: [PATCH v2 2/9] dt-bindings: clock: Add SM8550 TCSR CC clocks
Add bindings documentation for clock TCSR driver on SM8550.
Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
---
Changes since v1:
* based on recent bindings, like Krzysztof asked
* used qcom,gcc.yaml and dropped redundant properties
* used additionalProperties instead unevaluatedProperties
* renamed qcom,tcsrcc-sm8550.h to qcom,sm8550-tcsrcc.h, to match
compatible
* added dual lincese to qcom,sm8550-tcsrcc.h
* moved patch to the beginning of patchset
* dropped redundant "bindings" from subject line
.../bindings/clock/qcom,sm8550-tcsrcc.yaml | 39 +++++++++++++++++++
.../dt-bindings/clock/qcom,sm8550-tcsrcc.h | 18 +++++++++
2 files changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
new file mode 100644
index 000000000000..a4531a7cad8c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsrcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm TCSR Clock Controller on SM8550
+
+maintainers:
+ - Bjorn Andersson <andersson@...nel.org>
+
+description: |
+ Qualcomm TCSR clock control module provides the clocks, resets and
+ power domains on SM8550
+
+ See also:: include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
+
+allOf:
+ - $ref qcom,gcc.yaml#
+
+properties:
+ compatible:
+ const: qcom,sm8550-tcsrcc
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ clock-controller@...0000 {
+ compatible = "qcom,sm8550-tcsrcc";
+ reg = <0x1fc0000 0x30000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+...
diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
new file mode 100644
index 000000000000..4ce98ffc43ce
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2022, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
+#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
+
+/* GCC clocks */
+#define TCSR_PCIE_0_CLKREF_EN 0
+#define TCSR_PCIE_1_CLKREF_EN 1
+#define TCSR_UFS_CLKREF_EN 2
+#define TCSR_UFS_PAD_CLKREF_EN 3
+#define TCSR_USB2_CLKREF_EN 4
+#define TCSR_USB3_CLKREF_EN 5
+
+#endif
--
2.34.1
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