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Message-ID: <2238a980-7e04-1615-d836-c385a41628a9@gmail.com> Date: Wed, 23 Nov 2022 16:30:00 +0100 From: Matthias Brugger <matthias.bgg@...il.com> To: Allen-KH Cheng <allen-kh.cheng@...iatek.com>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> Cc: Project_Global_Chrome_Upstream_Group@...iatek.com, linux-usb@...r.kernel.org, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org, hsinyi@...omium.org Subject: Re: [PATCH v2 4/5] arm64: dts: mt8186: Add dsi node On 23/11/2022 14:55, Allen-KH Cheng wrote: > Add dsi node for mt8186 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com> Applied, thanks! > --- > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > index c0481f0dc527..4a2f7ad3c6f0 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > @@ -979,6 +979,25 @@ > power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > }; > > + dsi0: dsi@...13000 { > + compatible = "mediatek,mt8186-dsi"; > + reg = <0 0x14013000 0 0x1000>; > + clocks = <&mmsys CLK_MM_DSI0>, > + <&mmsys CLK_MM_DSI0_DSI_CK_DOMAIN>, > + <&mipi_tx0>; > + clock-names = "engine", "digital", "hs"; > + interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 0>; > + power-domains = <&spm MT8186_POWER_DOMAIN_DIS>; > + resets = <&mmsys MT8186_MMSYS_SW0_RST_B_DISP_DSI0>; > + phys = <&mipi_tx0>; > + phy-names = "dphy"; > + status = "disabled"; > + > + port { > + dsi_out: endpoint { }; > + }; > + }; > + > iommu_mm: iommu@...16000 { > compatible = "mediatek,mt8186-iommu-mm"; > reg = <0 0x14016000 0 0x1000>;
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