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Message-Id: <20221123211705.126900-1-nathan.morrison@timesys.com>
Date:   Wed, 23 Nov 2022 16:17:05 -0500
From:   Nathan Barrett-Morrison <nathan.morrison@...esys.com>
To:     unlisted-recipients:; (no To-header on input)
Cc:     nathan.morrison@...esys.com, greg.malysa@...esys.com,
        Mark Brown <broonie@...nel.org>,
        linux-spi@...r.kernel.org (open list:SPI SUBSYSTEM),
        linux-kernel@...r.kernel.org (open list)
Subject: [PATCH] spi: cadence-quadspi: Add upper limit safety check to baudrate divisor

While bringing up the cadence-quadspi driver on a customer board,
I discovered that the baud divisor calculation can exceed the
peripheral's maximum in some circumstances.  This will prevent it.

Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@...esys.com>
---
 drivers/spi/spi-cadence-quadspi.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 447230547945..250575fb7b0e 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1119,6 +1119,10 @@ static void cqspi_config_baudrate_div(struct cqspi_st *cqspi)
 	/* Recalculate the baudrate divisor based on QSPI specification. */
 	div = DIV_ROUND_UP(ref_clk_hz, 2 * cqspi->sclk) - 1;
 
+	/* Maximum baud divisor */
+	if (div > CQSPI_REG_CONFIG_BAUD_MASK)
+		div = CQSPI_REG_CONFIG_BAUD_MASK;
+
 	reg = readl(reg_base + CQSPI_REG_CONFIG);
 	reg &= ~(CQSPI_REG_CONFIG_BAUD_MASK << CQSPI_REG_CONFIG_BAUD_LSB);
 	reg |= (div & CQSPI_REG_CONFIG_BAUD_MASK) << CQSPI_REG_CONFIG_BAUD_LSB;
-- 
2.30.2

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