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Message-ID: <Y33iDVTuSglaN0O4@wendy>
Date: Wed, 23 Nov 2022 09:04:13 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Samuel Holland <samuel@...lland.org>
CC: <daniel.lezcano@...aro.org>, <tglx@...utronix.de>,
Anup Patel <anup@...infault.org>,
Palmer Dabbelt <palmer@...belt.com>,
Palmer Dabbelt <palmer@...osinc.com>, <aou@...s.berkeley.edu>,
<atishp@...shpatra.org>, <dmitriy@...-tech.org>,
<paul.walmsley@...ive.com>, <linux-kernel@...r.kernel.org>,
<linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v2] Revert "clocksource/drivers/riscv: Events are stopped
during CPU suspend"
Hey Samuel,
On Tue, Nov 22, 2022 at 11:49:49PM -0600, Samuel Holland wrote:
> On 11/22/22 06:16, Conor Dooley wrote:
> > This reverts commit 232ccac1bd9b5bfe73895f527c08623e7fa0752d.
> > To fix this, the x86 C3STOP feature was enabled for the timer driver -
>
> C3STOP isn't inherently x86-specific.
I think I originally had feature with "s around it & meant this as a
tongue-in-cheek reference to the header, which describes it as an "x86
(mis)feature" or something like that. Think I decided against that but
forgot to drop the x86 bit..
Could easily do s/x86// and it'd still make sense.
> > Fortunately, the D1 has a second timer, which is "currently used in
> > preference to the RISC-V/SBI timer driver" so a revert here does not
> > hurt operation of D1 in it's current form.
>
> typo: its
Good spot :)
> Acked-by: Samuel Holland <samuel@...lland.org>
Thanks!
Perhaps the two minor commit message bits could be fixed on application?
Otherwise, I will send a reworded one in a few days.
Conor.
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