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Message-ID: <5c766840-e092-45ea-0664-7bbdb78b933a@canonical.com>
Date:   Wed, 23 Nov 2022 18:27:18 +0800
From:   You-Sheng Yang <vicamo.yang@...onical.com>
To:     "David E. Box" <david.e.box@...ux.intel.com>
Cc:     michael.a.bottini@...el.com, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org, me@...ityamohan.in,
        rafael@...nel.org, hch@...radead.org, robh@...nel.org,
        bhelgaas@...gle.com, kw@...ux.com, lorenzo.pieralisi@....com,
        nirmal.patel@...ux.intel.com, jonathan.derrick@...ux.dev
Subject: Re: [PATCH V8 0/4] PCI: vmd: Enable PCIe ASPM and LTR on select
 hardware

Hi David,

On 11/3/22 10:18, David E. Box wrote:
> This series adds a work around for enabling PCIe ASPM and for setting PCIe
> LTR values on VMD reserved root ports on select platforms. While
> configuration of these capabilities is usually done by BIOS, on these
> platforms these capabilities will not be configured because the ports are
> not visible to BIOS. This was part of an initial design that expected the
> driver to completely handle the ports, including power management. However
> on Linux those ports are still managed by the PCIe core, which has the
> expectation that they adhere to device standards including BIOS
> configuration, leading to this problem.
>
> The target platforms are Tiger Lake, Alder Lake, and Raptor Lake though the
> latter has already implemented support for configuring the LTR values.
> Meteor Lake is expected add BIOS ASPM support, eliminating the future need
> for this work around.


It appears to me that this patch series works only on Tiger Lake. We 
have tried to revert our current work-arounds in Ubuntu kernels 
generic-5.15/oem-5.17/oem-6.0/unstable-6.1 and apply this series, the 
prebuilt kernels can be found in:

   https://launchpad.net/~vicamo/+archive/ubuntu/ppa-1996620

However, only TGL can still enter PC10 as before.


ADL-M, RPL platforms will stay in PC3 with vmd LTR set, but ASPM 
disabled. i915 RC6 blocked, too:

$ sudo cat /sys/kernel/debug/dri/

0/i915_dmc_info
...
DC3CO count: 0
DC3 -> DC5 count: 100
DC5 -> DC6 count: 0


> Note, the driver programs the LTRs because BIOS would also normally do this
> for devices that do not set them by default. Without this, SoC power
> management would be blocked on those platform. This SoC specific value is
> the maximum latency required to allow the SoC to enter the deepest power
> state.
>
> This patch addresses the following open bugzillas on VMD enabled laptops
> that cannot enter low power states.
>
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=212355
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=215063
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=213717
>
> David E. Box (3):
>    PCI: vmd: Use PCI_VDEVICE in device list
>    PCI: vmd: Create feature grouping for client products
>    PCI: vmd: Add quirk to configure PCIe ASPM and LTR
>
> Michael Bottini (1):
>    PCI/ASPM: Add pci_enable_link_state()
>
>   drivers/pci/controller/vmd.c | 96 ++++++++++++++++++++++++++----------
>   drivers/pci/pcie/aspm.c      | 54 ++++++++++++++++++++
>   include/linux/pci.h          |  7 +++
>   3 files changed, 131 insertions(+), 26 deletions(-)
>
>
> base-commit: 247f34f7b80357943234f93f247a1ae6b6c3a740


Regards,
You-Sheng Yang

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