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Message-ID: <d2209b3d-374c-efdd-a91f-217f1db3b4bf@intel.com>
Date: Tue, 22 Nov 2022 16:12:30 -0800
From: Reinette Chatre <reinette.chatre@...el.com>
To: Babu Moger <babu.moger@....com>, <corbet@....net>,
<tglx@...utronix.de>, <mingo@...hat.com>, <bp@...en8.de>
CC: <fenghua.yu@...el.com>, <dave.hansen@...ux.intel.com>,
<x86@...nel.org>, <hpa@...or.com>, <paulmck@...nel.org>,
<akpm@...ux-foundation.org>, <quic_neeraju@...cinc.com>,
<rdunlap@...radead.org>, <damien.lemoal@...nsource.wdc.com>,
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Subject: Re: [PATCH v8 05/13] x86/resctrl: Detect and configure Slow Memory
Bandwidth Allocation
Hi Babu,
On 11/4/2022 1:00 PM, Babu Moger wrote:
> The QoS slow memory configuration details are available via
> CPUID_Fn80000020_EDX_x02. Detect the available details and
> initialize the rest to defaults.
>
> Signed-off-by: Babu Moger <babu.moger@....com>
> ---
> arch/x86/kernel/cpu/resctrl/core.c | 36 +++++++++++++++++++++++++++--
> arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 2 +-
> arch/x86/kernel/cpu/resctrl/internal.h | 1 +
> arch/x86/kernel/cpu/resctrl/rdtgroup.c | 8 ++++--
> 4 files changed, 41 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index e31c98e2fafc..6571d08e2b0d 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -162,6 +162,13 @@ bool is_mba_sc(struct rdt_resource *r)
> if (!r)
> return rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl.membw.mba_sc;
>
> + /*
> + * The software controller support is only applicable to MBA resource.
> + * Make sure to check for resource type again.
> + */
/again/d
Not all callers of is_mba_sc() check if it is called for an MBA resource.
> + if (r->rid != RDT_RESOURCE_MBA)
> + return false;
> +
> return r->membw.mba_sc;
> }
>
> @@ -225,9 +232,15 @@ static bool __rdt_get_mem_config_amd(struct rdt_resource *r)
> struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
> union cpuid_0x10_3_eax eax;
> union cpuid_0x10_x_edx edx;
> - u32 ebx, ecx;
> + u32 ebx, ecx, subleaf;
>
> - cpuid_count(0x80000020, 1, &eax.full, &ebx, &ecx, &edx.full);
> + /*
> + * Query CPUID_Fn80000020_EDX_x01 for MBA and
> + * CPUID_Fn80000020_EDX_x02 for SMBA
> + */
> + subleaf = (r->rid == RDT_RESOURCE_SMBA) ? 2 : 1;
> +
> + cpuid_count(0x80000020, subleaf, &eax.full, &ebx, &ecx, &edx.full);
> hw_res->num_closid = edx.split.cos_max + 1;
> r->default_ctrl = MAX_MBA_BW_AMD;
>
> @@ -750,6 +763,19 @@ static __init bool get_mem_config(void)
> return false;
> }
>
> +static __init bool get_slow_mem_config(void)
> +{
> + struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_SMBA];
> +
> + if (!rdt_cpu_has(X86_FEATURE_SMBA))
> + return false;
> +
> + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
> + return __rdt_get_mem_config_amd(&hw_res->r_resctrl);
> +
> + return false;
> +}
> +
> static __init bool get_rdt_alloc_resources(void)
> {
> struct rdt_resource *r;
> @@ -780,6 +806,9 @@ static __init bool get_rdt_alloc_resources(void)
> if (get_mem_config())
> ret = true;
>
> + if (get_slow_mem_config())
> + ret = true;
> +
> return ret;
> }
>
> @@ -869,6 +898,9 @@ static __init void rdt_init_res_defs_amd(void)
> } else if (r->rid == RDT_RESOURCE_MBA) {
> hw_res->msr_base = MSR_IA32_MBA_BW_BASE;
> hw_res->msr_update = mba_wrmsr_amd;
> + } else if (r->rid == RDT_RESOURCE_SMBA) {
> + hw_res->msr_base = MSR_IA32_SMBA_BW_BASE;
> + hw_res->msr_update = mba_wrmsr_amd;
> }
> }
> }
I mentioned earlier that this can be moved to init of
rdt_resources_all[]. No strong preference, leaving here works
also.
Reinette
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