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Message-ID: <a380d04cc35e5f3f0addcf7f919a9579282a7a47.camel@mediatek.com>
Date:   Thu, 24 Nov 2022 03:24:49 +0000
From:   CK Hu (胡俊光) <ck.hu@...iatek.com>
To:     "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "airlied@...il.com" <airlied@...il.com>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        Yongqiang Niu (牛永强) 
        <yongqiang.niu@...iatek.com>,
        "chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
        "daniel@...ll.ch" <daniel@...ll.ch>,
        "sumit.semwal@...aro.org" <sumit.semwal@...aro.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linaro-mm-sig@...ts.linaro.org" <linaro-mm-sig@...ts.linaro.org>,
        "linux-media@...r.kernel.org" <linux-media@...r.kernel.org>,
        "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
        Project_Global_Chrome_Upstream_Group 
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        "hsinyi@...omium.org" <hsinyi@...omium.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v1] drm/mediatek: add dma buffer control for drm plane
 disable

Hi, Yongqiang:

On Fri, 2022-11-18 at 14:07 +0800, Yongqiang Niu wrote:
> get dma buffer when drm plane disable
> put dma buffer when overlay really disable

Describe why need this patch. I think this patch is to fix some problem
so add Fixes tag also.

> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_drm_crtc.c  | 11 +++++++++++
>  drivers/gpu/drm/mediatek/mtk_drm_plane.c | 12 ++++++++++++
>  drivers/gpu/drm/mediatek/mtk_drm_plane.h |  1 +
>  3 files changed, 24 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 112615817dcb..1b1341b57d62 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -4,6 +4,7 @@
>   */
>  
>  #include <linux/clk.h>
> +#include <linux/dma-buf.h>
>  #include <linux/dma-mapping.h>
>  #include <linux/mailbox_controller.h>
>  #include <linux/pm_runtime.h>
> @@ -283,6 +284,14 @@ struct mtk_ddp_comp
> *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc,
>  }
>  
>  #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> +static void mtk_drm_dma_buf_put(struct mtk_plane_state *plane_state)
> +{
> +	if (plane_state && plane_state->pending.dma_buf) {
> +		dma_buf_put(plane_state->pending.dma_buf);
> +		plane_state->pending.dma_buf = NULL;
> +	}
> +}
> +
>  static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg)
>  {
>  	struct cmdq_cb_data *data = mssg;
> @@ -306,6 +315,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl,
> void *mssg)
>  			plane_state = to_mtk_plane_state(plane->state);
>  
>  			plane_state->pending.config = false;
> +			mtk_drm_dma_buf_put(plane_state);
>  		}
>  		mtk_crtc->pending_planes = false;
>  	}
> @@ -318,6 +328,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl,
> void *mssg)
>  			plane_state = to_mtk_plane_state(plane->state);
>  
>  			plane_state->pending.async_config = false;
> +			mtk_drm_dma_buf_put(plane_state);
>  		}
>  		mtk_crtc->pending_async_planes = false;
>  	}
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index 2f5e007dd380..b67fdf12e237 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -11,6 +11,7 @@
>  #include <drm/drm_fourcc.h>
>  #include <drm/drm_framebuffer.h>
>  #include <drm/drm_gem_atomic_helper.h>
> +#include <linux/dma-buf.h>
>  
>  #include "mtk_drm_crtc.h"
>  #include "mtk_drm_ddp_comp.h"
> @@ -212,6 +213,17 @@ static void mtk_plane_atomic_disable(struct
> drm_plane *plane,
>  	struct drm_plane_state *new_state =
> drm_atomic_get_new_plane_state(state,
>  									
>    plane);
>  	struct mtk_plane_state *mtk_plane_state =
> to_mtk_plane_state(new_state);
> +	struct drm_plane_state *old_state =
> drm_atomic_get_old_plane_state(state,
> +								
>    plane);
> +
> +	if (old_state && old_state->fb) {
> +		struct drm_gem_object *gem = old_state->fb->obj[0];
> +
> +		if (gem && gem->dma_buf) {
> +			get_dma_buf(gem->dma_buf);

If CONFIG_MTK_CMDQ is not enable, you get dma buffer but not put dma
buffer. So put the dma buffer when CONFIG_MTK_CMDQ is not enable.

Regards,
CK

> +			mtk_plane_state->pending.dma_buf = gem-
> >dma_buf;
> +		}
> +	}
>  	mtk_plane_state->pending.enable = false;
>  	wmb(); /* Make sure the above parameter is set before update */
>  	mtk_plane_state->pending.dirty = true;
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.h
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.h
> index 2d5ec66e3df1..e0985b107c36 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.h
> @@ -25,6 +25,7 @@ struct mtk_plane_pending_state {
>  	bool				async_dirty;
>  	bool				async_config;
>  	enum drm_color_encoding		color_encoding;
> +	struct dma_buf			*dma_buf;
>  };
>  
>  struct mtk_plane_state {

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