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Date:   Thu, 24 Nov 2022 12:48:18 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Abel Vesa <abel.vesa@...aro.org>, Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Mike Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-clk@...r.kernel.org
Subject: Re: [PATCH v2 1/9] dt-bindings: clock: Add SM8550 GCC clocks

On 23/11/2022 15:20, Abel Vesa wrote:
> Add device tree bindings for global clock controller on SM8550 SoCs.
> 
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---
> 
> Changes since v1:
>  * dropped clock-names since driver uses IDs now
>  * based on recent bindings, like Krzysztof asked
>  * used qcom,gcc.yaml and dropped redundant properties
>  * renamed qcom,gcc-sm8550.h to qcom,sm8550-gcc.h, to match
>    compatible
>  * dropped "Optional", like Krzysztof asked
> 
>  .../bindings/clock/qcom,sm8550-gcc.yaml       |  56 +++++
>  include/dt-bindings/clock/qcom,sm8550-gcc.h   | 231 ++++++++++++++++++
>  2 files changed, 287 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,sm8550-gcc.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml
> new file mode 100644
> index 000000000000..acc540aa137d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sm8550-gcc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Global Clock & Reset Controller on SM8550
> +
> +maintainers:
> +  - Bjorn Andersson <andersson@...nel.org>
> +
> +description: |
> +  Qualcomm global clock control module provides the clocks, resets and power
> +  domains on SM8550
> +
> +  See also:: include/dt-bindings/clock/qcom,sm8550-gcc.h
> +
> +properties:
> +  compatible:
> +    const: qcom,sm8550-gcc
> +
> +  clocks:
> +    items:
> +      - description: Board XO source
> +      - description: Sleep clock source
> +      - description: PCIE 0 Pipe clock source
> +      - description: PCIE 1 Pipe clock source
> +      - description: PCIE 1 Phy Auxiliary clock source
> +      - description: UFS Phy Rx symbol 0 clock source
> +      - description: UFS Phy Rx symbol 1 clock source
> +      - description: UFS Phy Tx symbol 0 clock source
> +      - description: USB3 Phy wrapper pipe clock source
> +    minItems: 2

I didn't mention in your v1 this explicitly (although I asked Melody to
drop it), so apologies for this. Based on my understand and our IRC
discussion, these clocks are needed for the driver (even if optional in
some states of hardware). If driver needs them, let's make them
required, so please drop "minItems: 2".

Best regards,
Krzysztof

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