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Message-Id: <20221124125948.23432-5-ilpo.jarvinen@linux.intel.com>
Date: Thu, 24 Nov 2022 14:59:46 +0200
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: linux-serial@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>, linux-kernel@...r.kernel.org
Cc: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Subject: [PATCH 4/6] serial: 8250: Add IIR FIFOs enabled field properly
Don't use magic literals & comments but define a real field instead
for UART_IIR_FIFO_ENABLED and name also the values.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
---
drivers/tty/serial/8250/8250_port.c | 17 +++++++----------
include/uapi/linux/serial_reg.h | 4 ++++
2 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index e79bf2afd9be..6d343b15bc58 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -1293,22 +1293,19 @@ static void autoconfig(struct uart_8250_port *up)
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
- /* Assign this as it is to truncate any bits above 7. */
- scratch = serial_in(up, UART_IIR);
-
- switch (scratch >> 6) {
- case 0:
+ switch (serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED) {
+ case UART_IIR_FIFO_ENABLED_8250:
autoconfig_8250(up);
break;
- case 1:
- port->type = PORT_UNKNOWN;
- break;
- case 2:
+ case UART_IIR_FIFO_EAABLED_16550:
port->type = PORT_16550;
break;
- case 3:
+ case UART_IIR_FIFO_ENABLED_16550A:
autoconfig_16550a(up);
break;
+ default:
+ port->type = PORT_UNKNOWN;
+ break;
}
#ifdef CONFIG_SERIAL_8250_RSA
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index bab3b39266cc..a63c124b7fdc 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -44,6 +44,10 @@
#define UART_IIR_RX_TIMEOUT 0x0c /* OMAP RX Timeout interrupt */
#define UART_IIR_XOFF 0x10 /* OMAP XOFF/Special Character */
#define UART_IIR_CTS_RTS_DSR 0x20 /* OMAP CTS/RTS/DSR Change */
+#define UART_IIR_FIFO_ENABLED 0xc0 /* FIFOs enabled / port type identification */
+#define UART_IIR_FIFO_ENABLED_8250 0x00 /* 8250: no FIFO */
+#define UART_IIR_FIFO_EAABLED_16550 0x80 /* 16550: (broken/unusable) FIFO */
+#define UART_IIR_FIFO_ENABLED_16550A 0xc0 /* 16550A: FIFO enabled */
#define UART_FCR 2 /* Out: FIFO Control Register */
#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
--
2.30.2
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