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Message-Id: <20221124135829.2551873-2-vadym.kochan@plvision.eu>
Date: Thu, 24 Nov 2022 15:58:26 +0200
From: Vadym Kochan <vadym.kochan@...ision.eu>
To: Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Elad Nachman <enachman@...vell.com>,
Vadym Kochan <vadym.kochan@...ision.eu>
Subject: [PATCH v2 1/3] dt-bindings: PCI: armada8k: Add compatible string for AC5 SoC
AC5 SoC has armada8k PCIe IP so add compatible string for it.
Signed-off-by: Vadym Kochan <vadym.kochan@...ision.eu>
---
v2: no changes
Documentation/devicetree/bindings/pci/pci-armada8k.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
index ff25a134befa..b272fa4f08b5 100644
--- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt
+++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
@@ -4,7 +4,9 @@ This PCIe host controller is based on the Synopsys DesignWare PCIe IP
and thus inherits all the common properties defined in snps,dw-pcie.yaml.
Required properties:
-- compatible: "marvell,armada8k-pcie"
+- compatible: Should be set to one of the following:
+ - "marvell,armada8k-pcie" : For A7K/8K family of SoCs
+ - "marvell,ac5-pcie" : For AC5 family of SoCs
- reg: must contain two register regions
- the control register region
- the config space region
--
2.25.1
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