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Date: Fri, 25 Nov 2022 14:55:11 +0800
From: Pin-yen Lin <treapking@...omium.org>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Robert Foss <robert.foss@...aro.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Daniel Scally <djrscally@...il.com>,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Prashant Malani <pmalani@...omium.org>,
Benson Leung <bleung@...omium.org>,
Guenter Roeck <groeck@...omium.org>,
Javier Martinez Canillas <javierm@...hat.com>,
Stephen Boyd <swboyd@...omium.org>,
dri-devel@...ts.freedesktop.org,
Hsin-Yi Wang <hsinyi@...omium.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
devicetree@...r.kernel.org, chrome-platform@...ts.linux.dev,
linux-acpi@...r.kernel.org, Marek Vasut <marex@...x.de>,
Xin Ji <xji@...logixsemi.com>, Lyude Paul <lyude@...hat.com>,
Nícolas F . R . A . Prado
<nfraprado@...labora.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
linux-kernel@...r.kernel.org, Allen Chen <allen.chen@....com.tw>
Subject: Re: [PATCH v6 7/7] drm/bridge: it6505: Register Type C mode switches
Hi Andy,
Thanks for reviewing the patch.
On Thu, Nov 24, 2022 at 8:23 PM Andy Shevchenko
<andriy.shevchenko@...ux.intel.com> wrote:
>
> On Thu, Nov 24, 2022 at 06:20:56PM +0800, Pin-yen Lin wrote:
> > Register USB Type-C mode switches when the "mode-switch" property and
> > relevant port are available in Device Tree. Configure the "lane_swap"
> > state based on the entered alternate mode for a specific Type-C
> > connector, which ends up updating the lane swap registers of the it6505
> > chip.
>
> ...
>
> > config DRM_ITE_IT6505
> > tristate "ITE IT6505 DisplayPort bridge"
> > depends on OF
> > + depends on TYPEC || TYPEC=n
> > select DRM_DISPLAY_DP_HELPER
> > select DRM_DISPLAY_HDCP_HELPER
> > select DRM_DISPLAY_HELPER
>
> Something went wrong with the indentation. Perhaps you need to fix it first.
>
> ...
>
> > #include <drm/drm_edid.h>
> > #include <drm/drm_print.h>
> > #include <drm/drm_probe_helper.h>
> > +#include <drm/drm_of.h>
>
> Make it ordered?
Will fix it in v7.
>
> ...
>
> > +struct it6505_port_data {
>
> > + bool dp_connected;
>
> Perhaps make it last?
Will fix it in v7.
>
> > + struct typec_mux_dev *typec_mux;
> > + struct it6505 *it6505;
> > +};
>
> ...
>
> > +static void it6505_typec_ports_update(struct it6505 *it6505)
> > +{
> > + usleep_range(3000, 4000);
> > +
> > + if (it6505->typec_ports[0].dp_connected && it6505->typec_ports[1].dp_connected)
> > + /* Both ports available, do nothing to retain the current one. */
> > + return;
> > + else if (it6505->typec_ports[0].dp_connected)
> > + it6505->lane_swap = false;
> > + else if (it6505->typec_ports[1].dp_connected)
> > + it6505->lane_swap = true;
> > +
> > + usleep_range(3000, 4000);
> > +}
>
> As per previous patch comments.
Will update it in v7.
>
> Also, comment out these long sleeps. Why they are needed.
Actually, it turns out that these sleeps are not needed. I'll remove it in v7.
>
> ...
>
> > + int ret = pm_runtime_get_sync(dev);
> > +
> > + /*
> > + * On system resume, mux_set can be triggered before
> > + * pm_runtime_force_resume re-enables runtime power management.
>
> We refer to the functions as func().
Will fix this in v7.
>
> > + * Handling the error here to make sure the bridge is powered on.
> > + */
> > + if (ret < 0)
> > + it6505_poweron(it6505);
>
> This seems needed a bit more of explanation, esp. why you leave PM runtime
> reference count bumped up.
pm_runtime_force_suspend() disables runtime PM when the device enters
suspend, and sometime it6505_typec_mux_set() is called before
pm_runtime_force_resume brings runtime PM back. We force power up the
bridge in this case and leave the ref count incremented to make the
future pm_runtime_(get|put)_sync() calls balanced.
I'll include more explanations around this in v7.
>
> ...
>
> > + num_lanes = drm_of_get_data_lanes_count(node, 0, 2);
> > + if (num_lanes <= 0) {
> > + dev_err(dev, "Error on getting data lanes count: %d\n",
> > + num_lanes);
> > + return num_lanes;
> > + }
> > +
> > + ret = of_property_read_u32_array(node, "data-lanes", dp_lanes, num_lanes);
> > + if (ret) {
> > + dev_err(dev, "Failed to read the data-lanes variable: %d\n",
> > + ret);
> > + return ret;
> > + }
> > +
> > + for (i = 0; i < num_lanes; i++) {
> > + if (port_num != -1 && port_num != dp_lanes[i] / 2) {
> > + dev_err(dev, "Invalid data lane numbers\n");
> > + return -EINVAL;
> > + }
>
> As per previous patch comments.
I'll remove this part in v7 and try to figure out how to do similar
checking with schemas.
>
> > + port_num = dp_lanes[i] / 2;
> > + }
>
> The above seems like tons of duplicating code that drivers need to implement.
> Can we shrink that burden by adding some library functions?
Could you advise where this lib file should go, and what the namings
can be? The "port-switching" logic is specific to some of the DP
bridges, and I'm not sure what kinds of naming/structure fit into this
case.
Thanks and regards,
Pin-yen
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
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