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Message-Id: <20221125101953.18753-2-sherry.sun@nxp.com> Date: Fri, 25 Nov 2022 18:19:51 +0800 From: Sherry Sun <sherry.sun@....com> To: gregkh@...uxfoundation.org, jirislaby@...nel.org Cc: linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org, linux-imx@....com, atsushi.nemoto@...d.co.jp, tomonori.sakita@...d.co.jp Subject: [PATCH V3 1/3] tty: serial: fsl_lpuart: only enable Idle Line Interrupt for non-dma case For the lpuart driver, the Idle Line Interrupt Enable now is only needed for the CPU mode, so enable the UARTCTRL_ILIE at the correct place, and clear it when shutdown. Also need to configure the suitable UARTCTRL_IDLECFG, now the value is 0x7, represent 128 idle characters will trigger the Idle Line Interrupt. Signed-off-by: Sherry Sun <sherry.sun@....com> --- drivers/tty/serial/fsl_lpuart.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 5e69fb73f570..9b8d32262f1e 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -5,6 +5,8 @@ * Copyright 2012-2014 Freescale Semiconductor, Inc. */ +#include <linux/bitfield.h> +#include <linux/bits.h> #include <linux/clk.h> #include <linux/console.h> #include <linux/delay.h> @@ -181,7 +183,7 @@ #define UARTCTRL_SBK 0x00010000 #define UARTCTRL_MA1IE 0x00008000 #define UARTCTRL_MA2IE 0x00004000 -#define UARTCTRL_IDLECFG 0x00000100 +#define UARTCTRL_IDLECFG GENMASK(10, 8) #define UARTCTRL_LOOPS 0x00000080 #define UARTCTRL_DOZEEN 0x00000040 #define UARTCTRL_RSRC 0x00000020 @@ -1523,7 +1525,7 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport) ctrl = lpuart32_read(&sport->port, UARTCTRL); ctrl_saved = ctrl; ctrl &= ~(UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_TE | - UARTCTRL_RIE | UARTCTRL_RE); + UARTCTRL_RIE | UARTCTRL_RE | UARTCTRL_ILIE); lpuart32_write(&sport->port, ctrl, UARTCTRL); /* enable FIFO mode */ @@ -1547,7 +1549,8 @@ static void lpuart32_setup_watermark_enable(struct lpuart_port *sport) lpuart32_setup_watermark(sport); temp = lpuart32_read(&sport->port, UARTCTRL); - temp |= UARTCTRL_RE | UARTCTRL_TE | UARTCTRL_ILIE; + temp |= UARTCTRL_RE | UARTCTRL_TE; + temp |= FIELD_PREP(UARTCTRL_IDLECFG, 0x7); lpuart32_write(&sport->port, temp, UARTCTRL); } @@ -1691,7 +1694,7 @@ static void lpuart32_configure(struct lpuart_port *sport) } temp = lpuart32_read(&sport->port, UARTCTRL); if (!sport->lpuart_dma_rx_use) - temp |= UARTCTRL_RIE; + temp |= UARTCTRL_RIE | UARTCTRL_ILIE; if (!sport->lpuart_dma_tx_use) temp |= UARTCTRL_TIE; lpuart32_write(&sport->port, temp, UARTCTRL); @@ -1798,7 +1801,7 @@ static void lpuart32_shutdown(struct uart_port *port) /* disable Rx/Tx and interrupts */ temp = lpuart32_read(port, UARTCTRL); - temp &= ~(UARTCTRL_TE | UARTCTRL_RE | + temp &= ~(UARTCTRL_TE | UARTCTRL_RE | UARTCTRL_ILIE | UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_RIE); lpuart32_write(port, temp, UARTCTRL); -- 2.17.1
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