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Message-Id: <20221126191319.6404-5-samuel@sholland.org> Date: Sat, 26 Nov 2022 13:13:18 -0600 From: Samuel Holland <samuel@...lland.org> To: Chen-Yu Tsai <wens@...e.org>, Jernej Skrabec <jernej.skrabec@...il.com>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org> Cc: Samuel Holland <samuel@...lland.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, linux-sunxi@...ts.linux.dev, András Szemző <szemzo.andras@...il.com> Subject: [PATCH 4/5] clk: sunxi-ng: d1: Mark cpux clock as critical From: András Szemző <szemzo.andras@...il.com> Some SoCs in the D1 family feature ARM CPUs instead of a RISC-V CPU. In that case, the CPUs are driven from the 'cpux' clock, so it needs to be marked as critical. Signed-off-by: András Szemző <szemzo.andras@...il.com> Signed-off-by: Samuel Holland <samuel@...lland.org> --- drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c index 8ef3cdeb7962..c5a7df93602c 100644 --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c @@ -240,7 +240,7 @@ static const struct clk_parent_data cpux_parents[] = { { .hw = &pll_periph0_800M_clk.common.hw }, }; static SUNXI_CCU_MUX_DATA(cpux_clk, "cpux", cpux_parents, - 0x500, 24, 3, CLK_SET_RATE_PARENT); + 0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); static const struct clk_hw *cpux_hws[] = { &cpux_clk.common.hw }; static SUNXI_CCU_M_HWS(cpux_axi_clk, "cpux-axi", -- 2.37.4
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