lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-Id: <20221126234134.32660-4-samuel@sholland.org> Date: Sat, 26 Nov 2022 17:41:34 -0600 From: Samuel Holland <samuel@...lland.org> To: Marc Zyngier <maz@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, Palmer Dabbelt <palmer@...belt.com> Cc: linux-riscv@...ts.infradead.org, Samuel Holland <samuel@...lland.org>, Paul Walmsley <paul.walmsley@...ive.com>, linux-kernel@...r.kernel.org Subject: [PATCH 3/3] irqchip/sifive-plic: Enable oneshot-safe threaded EOIs This defers the EOI until the IRQ thread has finished, avoiding the need to mask the IRQ while the thread is pending. Signed-off-by: Samuel Holland <samuel@...lland.org> --- drivers/irqchip/irq-sifive-plic.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index ff47bd0dec45..d8fc3354b38c 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -203,6 +203,8 @@ static struct irq_chip plic_chip = { #endif .irq_set_type = plic_irq_set_type, .flags = IRQCHIP_SKIP_SET_WAKE | + IRQCHIP_ONESHOT_SAFE | + IRQCHIP_EOI_THREADED | IRQCHIP_AFFINITY_PRE_STARTUP, }; -- 2.37.4
Powered by blists - more mailing lists