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Message-Id: <20221128171215.1768745-1-bhupesh.sharma@linaro.org>
Date: Mon, 28 Nov 2022 22:42:15 +0530
From: Bhupesh Sharma <bhupesh.sharma@...aro.org>
To: linux-arm-msm@...r.kernel.org
Cc: devicetree@...r.kernel.org, agross@...nel.org,
bhupesh.sharma@...aro.org, bhupesh.linux@...il.com,
linux-kernel@...r.kernel.org, robh+dt@...nel.org,
krzysztof.kozlowski@...aro.org, me@...ren.info,
konrad.dybcio@...ainline.org,
Bjorn Andersson <andersson@...nel.org>
Subject: [PATCH] arm64: dts: qcom: sm6115: Add geni debug uart node for qup0
qup0 on sm6115 / sm4250 has 6 SEs, with SE4 as debug uart.
Add the debug uart node in sm6115 dtsi file.
Cc: Bjorn Andersson <andersson@...nel.org>
Cc: Rob Herring <robh+dt@...nel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
---
- Based on linux-next.
arch/arm64/boot/dts/qcom/sm6115.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 0340ed21be05..e4a2440ce544 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -649,6 +649,26 @@ ufs_mem_phy_lanes: phy@...7400 {
};
};
+ qupv3_id_0: geniqup@...0000 {
+ compatible = "qcom,geni-se-qup";
+ reg = <0x4ac0000 0x2000>;
+ clock-names = "m-ahb", "s-ahb";
+ clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
+ <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ uart4: serial@...0000 {
+ compatible = "qcom,geni-debug-uart";
+ reg = <0x4a90000 0x4000>;
+ clock-names = "se";
+ clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
+ interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+ };
+
usb_1: usb@...8800 {
compatible = "qcom,sm6115-dwc3", "qcom,dwc3";
reg = <0x04ef8800 0x400>;
--
2.38.1
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