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Message-Id: <20221128172455.159787-1-nathan.morrison@timesys.com>
Date: Mon, 28 Nov 2022 12:24:54 -0500
From: Nathan Barrett-Morrison <nathan.morrison@...esys.com>
To: unlisted-recipients:; (no To-header on input)
Cc: nathan.morrison@...esys.com, greg.malysa@...esys.com,
Tudor Ambarus <tudor.ambarus@...rochip.com>,
Pratyush Yadav <pratyush@...nel.org>,
Michael Walle <michael@...le.cc>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
linux-mtd@...ts.infradead.org (open list:SPI NOR SUBSYSTEM),
linux-kernel@...r.kernel.org (open list)
Subject: [PATCH] mtd: spi-nor: issi: Add in support for IS25LX256 chip, operating in 1S-1S-8S mode.
Adds the is25lx256 entry to the nor_parts table along with the additional
fixup logic to operate in 1S-1S-8S mode while programming.
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@...esys.com>
---
drivers/mtd/spi-nor/issi.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index 89a66a19d754..e9b32b726bf3 100644
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -29,6 +29,21 @@ static const struct spi_nor_fixups is25lp256_fixups = {
.post_bfpt = is25lp256_post_bfpt_fixups,
};
+static void is25lx256_post_sfdp_fixup(struct spi_nor *nor)
+{
+ /* Fixup page program command to 1S-1S-8S */
+ nor->params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_8;
+ spi_nor_set_pp_settings(&nor->params->page_programs[SNOR_CMD_PP_1_1_8],
+ SPINOR_OP_PP_1_1_8, SNOR_PROTO_1_1_8);
+
+ /* Disable quad_enable */
+ nor->params->quad_enable = NULL;
+}
+
+static struct spi_nor_fixups is25lx256_fixups = {
+ .post_sfdp = is25lx256_post_sfdp_fixup,
+};
+
static void pm25lv_nor_late_init(struct spi_nor *nor)
{
struct spi_nor_erase_map *map = &nor->params->erase_map;
@@ -74,6 +89,10 @@ static const struct flash_info issi_nor_parts[] = {
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
.fixups = &is25lp256_fixups },
+ { "is25lx256", INFO(0x9d5a19, 0, 128 * 1024, 256)
+ NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ)
+ FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
+ .fixups = &is25lx256_fixups },
/* PMC */
{ "pm25lv512", INFO(0, 0, 32 * 1024, 2)
--
2.30.2
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