lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 28 Nov 2022 23:20:11 +0100
From:   Borislav Petkov <bp@...en8.de>
To:     Uros Bizjak <ubizjak@...il.com>
Cc:     x86@...nel.org, linux-kernel@...r.kernel.org,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH] x86/boot: Remove x86_32 PIC using ebx workaround

On Fri, Nov 04, 2022 at 01:45:46PM +0100, Uros Bizjak wrote:
> Current minimum required version of GCC is version 5.1 which allows
> reuse of PIC hard register on x86/x86-64 targets [1]. Remove
> obsolete workaround that was needed for earlier GCC versions.
> 
> [1] https://gcc.gnu.org/gcc-5/changes.html

Thanks for the doc pointer.

Lemme see if I understand this commit message correctly:

SysV i386 ABI says that %ebx is used as the base reg in PIC. gcc 5 and
newer can handle all possible cases properly where inline asm could
clobber the PIC reg. I.e., it is able to deal with the "=b" constraint
where an insn can overwrite %ebx and it'll push and pop around that
statement.

So far so good.

Why then does this matter for x86-64 where PIC addressing is done
rip-relative so %rbx is normal reg there?

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ