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Message-ID: <7b6ffbb4-80fb-610a-c839-e3bf1668d4ed@quicinc.com>
Date: Mon, 28 Nov 2022 11:27:42 +0530
From: Sibi Sankar <quic_sibis@...cinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
<andersson@...nel.org>
CC: <agross@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <robh+dt@...nel.org>,
<konrad.dybcio@...ainline.org>, <robimarko@...il.com>,
<quic_gurus@...cinc.com>, <quic_rjendra@...cinc.com>
Subject: Re: [PATCH V5 1/2] dt-bindings: firmware: qcom-scm: Add optional
interrupt
Hey Krzysztof,
Thanks for taking time to review the series.
On 11/24/22 16:43, Krzysztof Kozlowski wrote:
> On 23/11/2022 21:46, Sibi Sankar wrote:
>> From: Guru Das Srinagesh <quic_gurus@...cinc.com>
>>
>> Add an interrupt specification to the bindings to support the wait-queue
>> feature.
>
> Subject - this is qcom,scm, not qcom-scm.
ack
>
>
>>
>> Signed-off-by: Guru Das Srinagesh <quic_gurus@...cinc.com>
>> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>> ---
>>
>> v5:
>> - Pick up R-b
>>
>> v4:
>> - Qualify bindings [Krzysztoff]
>>
>> Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
>> index 25688571ee7c..aea6e0c86a89 100644
>> --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
>> +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
>> @@ -73,6 +73,12 @@ properties:
>> '#reset-cells':
>> const: 1
>>
>> + interrupts:
>> + description:
>> + The wait-queue interrupt that firmware raises as part of handshake
>> + protocol to handle sleeping SCM calls.
>> + maxItems: 1
>
> Which devices have interrupts?
>
> We talked about it here:
> https://lore.kernel.org/all/2464d90f-64e9-5e3c-404b-10394c3bc302@quicinc.com/
> and here:
> https://lore.kernel.org/all/c20edd0d-7613-5683-60e7-54317cac6e0b@linaro.org/
>
> But I still don't get which devices support it and which do not.
lol, I thought we reached a consensus earlier because of the "ok" and
R-b. Like I explained earlier the bootloader would be adding interrupt
on the fly, wouldn't such cases cause binding check failure if we list
all the devices supporting it? Also some of the SM8450 devices in the
wild would be running firmware not having the feature but I guess
eventually most of the them will end up supporting the feature in the
end.
>
>
> BTW: >
https://lore.kernel.org/all/20221122092345.44369-2-krzysztof.kozlowski@linaro.org/
Yup had a look at ^^, IIRC there are additional SoCs that can have the
interconnects specified in their device tree.
>
>
> Best regards,
> Krzysztof
>
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