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Message-ID: <20221128020613.14821-6-xiangsheng.hou@mediatek.com>
Date: Mon, 28 Nov 2022 10:06:09 +0800
From: Xiangsheng Hou <xiangsheng.hou@...iatek.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Mark Brown <broonie@...nel.org>,
Chuanhong Guo <gch981213@...il.com>
CC: Xiangsheng Hou <xiangsheng.hou@...iatek.com>,
<linux-mtd@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-spi@...r.kernel.org>,
<benliang.zhao@...iatek.com>, <bin.zhang@...iatek.com>
Subject: [PATCH 5/9] dt-bindings: spi: mtk-snfi: add mt7986 IC snfi bindings
1. add mt7986 IC bindings
2. add optional nfi_hclk property which needed for mt7986
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@...iatek.com>
---
.../devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
index 6e6e02c91780..ee20075cd0e7 100644
--- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
+++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
@@ -26,6 +26,7 @@ properties:
enum:
- mediatek,mt7622-snand
- mediatek,mt7629-snand
+ - mediatek,mt7986-snand
reg:
items:
@@ -36,14 +37,19 @@ properties:
- description: NFI interrupt
clocks:
+ minItems: 2
items:
- description: clock used for the controller
- description: clock used for the SPI bus
+ - description: clock used for the AHB bus dma bus, this depends on
+ hardware design, so this is optional.
clock-names:
+ minItems: 2
items:
- const: nfi_clk
- const: pad_clk
+ - const: nfi_hclk
nand-ecc-engine:
description: device-tree node of the accompanying ECC engine.
--
2.25.1
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