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Date: Tue, 29 Nov 2022 10:53:09 -0800 From: Asutosh Das <quic_asutoshd@...cinc.com> To: <quic_cang@...cinc.com>, <martin.petersen@...cle.com>, <linux-scsi@...r.kernel.org> CC: <quic_nguyenb@...cinc.com>, <quic_xiaosenh@...cinc.com>, <stanley.chu@...iatek.com>, <eddie.huang@...iatek.com>, <daejun7.park@...sung.com>, <bvanassche@....org>, <avri.altman@....com>, <mani@...nel.org>, <beanhuo@...ron.com>, Asutosh Das <quic_asutoshd@...cinc.com>, <linux-arm-msm@...r.kernel.org>, Alim Akhtar <alim.akhtar@...sung.com>, "James E.J. Bottomley" <jejb@...ux.ibm.com>, Jinyoung Choi <j-young.choi@...sung.com>, open list <linux-kernel@...r.kernel.org> Subject: [PATCH v7 03/16] ufs: core: Introduce Multi-circular queue capability Add support to check for MCQ capability in the UFSHC. Add a module parameter to disable MCQ if needed. Co-developed-by: Can Guo <quic_cang@...cinc.com> Signed-off-by: Can Guo <quic_cang@...cinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@...cinc.com> Reviewed-by: Bart Van Assche <bvanassche@....org> Reviewed-by: Manivannan Sadhasivam <mani@...nel.org> --- drivers/ufs/core/ufshcd.c | 26 ++++++++++++++++++++++++++ include/ufs/ufshcd.h | 2 ++ 2 files changed, 28 insertions(+) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 595fd3c..eca15b0 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -89,6 +89,28 @@ /* Polling time to wait for fDeviceInit */ #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */ +/* UFSHC 4.0 compliant HC support this mode, refer param_set_mcq_mode() */ +static bool use_mcq_mode = true; + +static int param_set_mcq_mode(const char *val, const struct kernel_param *kp) +{ + int ret; + + ret = param_set_bool(val, kp); + if (ret) + return ret; + + return 0; +} + +static const struct kernel_param_ops mcq_mode_ops = { + .set = param_set_mcq_mode, + .get = param_get_bool, +}; + +module_param_cb(use_mcq_mode, &mcq_mode_ops, &use_mcq_mode, 0644); +MODULE_PARM_DESC(use_mcq_mode, "Control MCQ mode for controllers starting from UFSHCI 4.0. 1 - enable MCQ, 0 - disable MCQ. MCQ is enabled by default"); + #define ufshcd_toggle_vreg(_dev, _vreg, _on) \ ({ \ int _ret; \ @@ -2258,6 +2280,10 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba) if (err) dev_err(hba->dev, "crypto setup failed\n"); + hba->mcq_sup = FIELD_GET(MASK_MCQ_SUPPORT, hba->capabilities); + if (!hba->mcq_sup) + return err; + hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP); hba->ext_iid_sup = FIELD_GET(MASK_EXT_IID_SUPPORT, hba->mcq_capabilities); diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index aec37cb9..70c0f9f 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -832,6 +832,7 @@ struct ufs_hba_monitor { * @complete_put: whether or not to call ufshcd_rpm_put() from inside * ufshcd_resume_complete() * @ext_iid_sup: is EXT_IID is supported by UFSHC + * @mcq_sup: is mcq supported by UFSHC */ struct ufs_hba { void __iomem *mmio_base; @@ -982,6 +983,7 @@ struct ufs_hba { u32 luns_avail; bool complete_put; bool ext_iid_sup; + bool mcq_sup; }; /* Returns true if clocks can be gated. Otherwise false */ -- 2.7.4
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