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Message-ID: <f30fed7c-45bc-9b71-9c57-c8d9ec395597@acm.org>
Date:   Tue, 29 Nov 2022 11:23:51 -0800
From:   Bart Van Assche <bvanassche@....org>
To:     Asutosh Das <quic_asutoshd@...cinc.com>, quic_cang@...cinc.com,
        martin.petersen@...cle.com, linux-scsi@...r.kernel.org
Cc:     quic_nguyenb@...cinc.com, quic_xiaosenh@...cinc.com,
        stanley.chu@...iatek.com, eddie.huang@...iatek.com,
        daejun7.park@...sung.com, avri.altman@....com, mani@...nel.org,
        beanhuo@...ron.com, linux-arm-msm@...r.kernel.org,
        Alim Akhtar <alim.akhtar@...sung.com>,
        "James E.J. Bottomley" <jejb@...ux.ibm.com>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Jinyoung Choi <j-young.choi@...sung.com>,
        Arthur Simchaev <Arthur.Simchaev@....com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Kiwoong Kim <kwmad.kim@...sung.com>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v7 09/16] ufs: core: mcq: Configure operation and runtime
 interface

On 11/29/22 10:53, Asutosh Das wrote:
> Runtime and operation registers are defined per Submission
> and Completion queue.
> The location of these registers is not defined in the spec;
> meaning the offsets and stride may vary for different
> HC vendors. Establish the stride, base address and doorbell
> address offsets from vendor host driver and program it.

Reviewed-by: Bart Van Assche <bvanassche@....org>

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