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Message-ID: <CALs4sv0x04ODvWv-av56-FtnnpsC_8Sudp8T0U0buNRt+hq9bA@mail.gmail.com>
Date: Tue, 29 Nov 2022 14:13:35 +0530
From: Pavan Chebbi <pavan.chebbi@...adcom.com>
To: Arun Ramadoss <arun.ramadoss@...rochip.com>
Cc: linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
woojung.huh@...rochip.com, UNGLinuxDriver@...rochip.com,
andrew@...n.ch, vivien.didelot@...il.com, f.fainelli@...il.com,
olteanv@...il.com, davem@...emloft.net, edumazet@...gle.com,
kuba@...nel.org, pabeni@...hat.com, linux@...linux.org.uk,
Tristram.Ha@...rochip.com, richardcochran@...il.com,
ceggers@...i.de
Subject: Re: [Patch net-next v1 04/12] net: dsa: microchip: ptp: Manipulating
absolute time using ptp hw clock
On Mon, Nov 28, 2022 at 4:04 PM Arun Ramadoss
<arun.ramadoss@...rochip.com> wrote:
> +/* Function is pointer to the do_aux_work in the ptp_clock capability */
> +static long ksz_ptp_do_aux_work(struct ptp_clock_info *ptp)
> +{
> + struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
> + struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
> + struct timespec64 ts;
> +
> + mutex_lock(&ptp_data->lock);
> + _ksz_ptp_gettime(dev, &ts);
> + mutex_unlock(&ptp_data->lock);
> +
> + spin_lock_bh(&ptp_data->clock_lock);
> + ptp_data->clock_time = ts;
> + spin_unlock_bh(&ptp_data->clock_lock);
If I understand this correctly, the software clock is updated with
full 64b every 1s. However only 32b timestamp registers are read while
processing packets and higher bits from this clock are used.
How do you ensure these higher order bits are in sync with the higher
order bits in the HW? IOW, what if lower 32b have wrapped around and
you are required to stamp a packet but you still don't have aux worker
updated.
> +
> + return HZ; /* reschedule in 1 second */
> +}
> +
> static int ksz_ptp_start_clock(struct ksz_device *dev)
> {
> - return ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ENABLE, PTP_CLK_ENABLE);
> + struct ksz_ptp_data *ptp_data = &dev->ptp_data;
> + int ret;
> +
> + ret = ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ENABLE, PTP_CLK_ENABLE);
> + if (ret)
> + return ret;
> +
> + spin_lock_bh(&ptp_data->clock_lock);
> + ptp_data->clock_time.tv_sec = 0;
> + ptp_data->clock_time.tv_nsec = 0;
> + spin_unlock_bh(&ptp_data->clock_lock);
> +
> + return 0;
> }
>
> static const struct ptp_clock_info ksz_ptp_caps = {
> @@ -305,6 +357,7 @@ static const struct ptp_clock_info ksz_ptp_caps = {
> .settime64 = ksz_ptp_settime,
> .adjfine = ksz_ptp_adjfine,
> .adjtime = ksz_ptp_adjtime,
> + .do_aux_work = ksz_ptp_do_aux_work,
> };
>
> int ksz_ptp_clock_register(struct dsa_switch *ds)
> @@ -315,6 +368,7 @@ int ksz_ptp_clock_register(struct dsa_switch *ds)
>
> ptp_data = &dev->ptp_data;
> mutex_init(&ptp_data->lock);
> + spin_lock_init(&ptp_data->clock_lock);
>
> ptp_data->caps = ksz_ptp_caps;
>
> diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchip/ksz_ptp.h
> index 17f455c3b2c5..81fa2e8b9cf4 100644
> --- a/drivers/net/dsa/microchip/ksz_ptp.h
> +++ b/drivers/net/dsa/microchip/ksz_ptp.h
> @@ -15,6 +15,9 @@ struct ksz_ptp_data {
> struct ptp_clock *clock;
> /* Serializes all operations on the PTP hardware clock */
> struct mutex lock;
> + /* lock for accessing the clock_time */
> + spinlock_t clock_lock;
> + struct timespec64 clock_time;
> };
>
> int ksz_ptp_clock_register(struct dsa_switch *ds);
> --
> 2.36.1
>
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