linux-kernel - Re: [PATCH v3 6/7] x86/cpu, kvm: Support AMD Automatic IBRS

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Message-ID: <20221130203649.gwhypmw35mfgwsxh@desk>
Date:   Wed, 30 Nov 2022 12:36:49 -0800
From:   Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To:     Kim Phillips <kim.phillips@....com>
Cc:     x86@...nel.org, Babu Moger <Babu.Moger@....com>,
        Borislav Petkov <bp@...en8.de>, Borislav Petkov <bp@...e.de>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
        Joao Martins <joao.m.martins@...cle.com>,
        Jonathan Corbet <corbet@....net>,
        Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        David Woodhouse <dwmw@...zon.co.uk>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Juergen Gross <jgross@...e.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Tony Luck <tony.luck@...el.com>,
        Tom Lendacky <thomas.lendacky@....com>,
        Alexey Kardashevskiy <aik@....com>, kvm@...r.kernel.org,
        linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 6/7] x86/cpu, kvm: Support AMD Automatic IBRS

On Tue, Nov 29, 2022 at 05:58:15PM -0600, Kim Phillips wrote:
>--- a/arch/x86/kernel/cpu/common.c
>+++ b/arch/x86/kernel/cpu/common.c
>@@ -1406,6 +1406,14 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
> 	    !(ia32_cap & ARCH_CAP_PBRSB_NO))
> 		setup_force_cpu_bug(X86_BUG_EIBRS_PBRSB);
>
>+	/*
>+	 * AMD's AutoIBRS is equivalent to Intel's eIBRS - use the Intel flag only
>+	 * after IBRS_ENHANCED bugs such as BUG_EIBRS_PBRSB above have been
>+	 * determined.
>+	 */

Minor comment, setting NO_EIBRS_PBRSB in cpu_vuln_whitelist for
non-EIBRS CPUs also (AMD and others) can remove this order dependency.

>+	if (cpu_has(c, X86_FEATURE_AUTOIBRS))
>+		setup_force_cpu_cap(X86_FEATURE_IBRS_ENHANCED);