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Message-Id: <1669810824-32094-1-git-send-email-quic_vnivarth@quicinc.com>
Date:   Wed, 30 Nov 2022 17:50:24 +0530
From:   Vijaya Krishna Nivarthi <quic_vnivarth@...cinc.com>
To:     agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
        vkoul@...nel.org, linux-arm-msm@...r.kernel.org,
        dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     quic_msavaliy@...cinc.com, dianders@...omium.org, mka@...omium.org,
        swboyd@...omium.org, quic_vtanuku@...cinc.com,
        Vijaya Krishna Nivarthi <quic_vnivarth@...cinc.com>
Subject: [PATCH] dmaengine: qcom: gpi: Set link_rx bit on GO TRE for rx operation

As per GSI spec, link_rx bit is to be set on GO TRE on tx
channel whenever there is going to be a DMA TRE on rx
channel. This is currently set for duplex operation only.

Set the bit for rx operation as well.

Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@...cinc.com>
---
 drivers/dma/qcom/gpi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c
index 061add8..59a36cb 100644
--- a/drivers/dma/qcom/gpi.c
+++ b/drivers/dma/qcom/gpi.c
@@ -1756,6 +1756,7 @@ static int gpi_create_spi_tre(struct gchan *chan, struct gpi_desc *desc,
 		tre->dword[3] = u32_encode_bits(TRE_TYPE_GO, TRE_FLAGS_TYPE);
 		if (spi->cmd == SPI_RX) {
 			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_IEOB);
+			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_LINK);
 		} else if (spi->cmd == SPI_TX) {
 			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_CHAIN);
 		} else { /* SPI_DUPLEX */
-- 
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by the Linux Foundation.

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