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Message-Id: <20221201212750.267721-1-nathan.morrison@timesys.com>
Date: Thu, 1 Dec 2022 16:27:47 -0500
From: Nathan Barrett-Morrison <nathan.morrison@...esys.com>
To: unlisted-recipients:; (no To-header on input)
Cc: nathan.morrison@...esys.com, greg.malysa@...esys.com,
Tudor Ambarus <tudor.ambarus@...rochip.com>,
Pratyush Yadav <pratyush@...nel.org>,
Michael Walle <michael@...le.cc>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
linux-mtd@...ts.infradead.org (open list:SPI NOR SUBSYSTEM),
linux-kernel@...r.kernel.org (open list)
Subject: [PATCH v3 0/3] mtd: spi-nor: Extend SFDP to support additional octal modes as per latest JEDEC standard
In the latest JEDEC standard (JESD216F), there are now bitfields in the
4 byte address instruction table for 1S-1S-8S and 1S-8S-8S modes
This patchset adds support for checking the 4BAIT for these modes,
along with additional NO_SFDP_FLAGS to support enabling these new modes
v2: Move page program commands into sfdp.c instead of core.c,
as this appears to conform more closely with spi-nor paradigm.
Page program buswidth appears to be automatically determined, so let's
follow suit and do the same.
v3:
- Added missing SPI_NOR_OCTAL_READ_1_8_8 to spi_nor_sfdp check in
spi_nor_init_params_deprecated()
- Convert IS25LX256 to 1S-8S-8S instead of 1S-1S-8S
- Tested and confirmed both 1S-1S-8S and 1S-8S-8S work on IS25LX256
Nathan Barrett-Morrison (3):
mtd: spi-nor: Extend SFDP 4byte address instruction lookup table with
new octal modes as per JEDEC JESD216F
mtd: spi-nor: Add additional octal-mode flags to be checked during
SFDP
mtd: spi-nor: Add support for IS25LX256 operating in 1S-8S-8S octal
read mode
drivers/mtd/spi-nor/core.c | 8 ++++++++
drivers/mtd/spi-nor/core.h | 5 +++--
drivers/mtd/spi-nor/issi.c | 3 +++
drivers/mtd/spi-nor/sfdp.c | 13 +++++++++++++
4 files changed, 27 insertions(+), 2 deletions(-)
--
2.30.2
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