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Message-ID: <CAP-5=fWKbC_wOLiAnEnPV42mM9fpobJD++wKohFYVU66LdaJ-g@mail.gmail.com>
Date: Fri, 2 Dec 2022 09:36:14 -0800
From: Ian Rogers <irogers@...gle.com>
To: Colin Ian King <colin.i.king@...il.com>
Cc: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H . Peter Anvin" <hpa@...or.com>,
Kim Phillips <kim.phillips@....com>,
linux-perf-users@...r.kernel.org, kernel-janitors@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH][next] perf/x86/amd: fix potential integer overflow on
shift of a int
On Fri, Dec 2, 2022 at 5:52 AM Colin Ian King <colin.i.king@...il.com> wrote:
>
> The left shift of int 32 bit integer constant 1 is evaluated using 32 bit
> arithmetic and then passed as a 64 bit function argument. In the case where
> i is 32 or more this can lead to an overflow. Avoid this by shifting
> using the BIT_ULL macro instead.
>
> Fixes: 471af006a747 ("perf/x86/amd: Constrain Large Increment per Cycle events")
> Signed-off-by: Colin Ian King <colin.i.king@...il.com>
Acked-by: Ian Rogers <irogers@...gle.com>
Thanks,
Ian
> ---
> arch/x86/events/amd/core.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
> index d6f3703e4119..4386b10682ce 100644
> --- a/arch/x86/events/amd/core.c
> +++ b/arch/x86/events/amd/core.c
> @@ -1387,7 +1387,7 @@ static int __init amd_core_pmu_init(void)
> * numbered counter following it.
> */
> for (i = 0; i < x86_pmu.num_counters - 1; i += 2)
> - even_ctr_mask |= 1 << i;
> + even_ctr_mask |= BIT_ULL(i);
>
> pair_constraint = (struct event_constraint)
> __EVENT_CONSTRAINT(0, even_ctr_mask, 0,
> --
> 2.38.1
>
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