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Message-ID: <mhng-cf616c36-e110-4274-9bbf-cc6a22b75ed5@palmer-ri-x1c9a>
Date:   Fri, 02 Dec 2022 10:00:35 -0800 (PST)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     hal.feng@...rfivetech.com
CC:     linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        Conor Dooley <conor@...nel.org>, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org,
        Paul Walmsley <paul.walmsley@...ive.com>,
        aou@...s.berkeley.edu, ben.dooks@...ive.com, tglx@...utronix.de,
        Marc Zyngier <maz@...nel.org>, sboyd@...nel.org,
        mturquette@...libre.com, p.zabel@...gutronix.de,
        linus.walleij@...aro.org, emil.renner.berthing@...onical.com,
        hal.feng@...rfivetech.com, linux-kernel@...r.kernel.org
Subject:     Re: [PATCH v2 8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW

On Thu, 17 Nov 2022 17:17:14 PST (-0800), hal.feng@...rfivetech.com wrote:
> Add CONFIG_SERIAL_8250_DW=y, which is a necessary option for
> StarFive JH7110 and JH7100 SoCs to boot with serial ports.
>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> ---
>  arch/riscv/configs/defconfig | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 05fd5fcf24f9..a23d022974ad 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -122,6 +122,7 @@ CONFIG_MICROSEMI_PHY=y
>  CONFIG_INPUT_MOUSEDEV=y
>  CONFIG_SERIAL_8250=y
>  CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_8250_DW=y
>  CONFIG_SERIAL_OF_PLATFORM=y
>  CONFIG_VIRTIO_CONSOLE=y
>  CONFIG_HW_RANDOM=y

Acked-by: Palmer Dabbelt <palmer@...osinc.com>

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