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Message-ID: <CAD=FV=XeaskcBRVRQDoha7Xiv9j57fuvtcSJUeN7HCZSGVJ8uQ@mail.gmail.com>
Date:   Thu, 1 Dec 2022 16:50:24 -0800
From:   Doug Anderson <dianders@...omium.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Rob Clark <robdclark@...omium.org>,
        Fritz Koenig <frkoenig@...gle.com>
Subject: Re: [RFT PATCH v2 2/2] arm64: dts: qcom: sdm845: align TLMM pin
 configuration with DT schema

Hi,

On Fri, Nov 18, 2022 at 8:42 AM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> DT schema expects TLMM pin configuration nodes to be named with
> '-state' suffix and their optional children with '-pins' suffix.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>
> ---
>
> Cc: Doug Anderson <dianders@...omium.org>
>
> Tested on Qualcomm RB3. Please kndly test a bit more on other devices.
> This should not have an functional impact.

Added Rob Clark and Fritz who are the only people I know that still do
anything with cheza.


> -       wcd_intr_default: wcd_intr_default {
> +       wcd_intr_default: wcd-intr-default-state {
>                 pins = <54>;

Not new to your patch, but I'm surprised it truly works to use an
integer for a pin? How does it know that 54 is an integer and not a
string???


>  &qup_uart3_default {
> -       pinmux {
> -               pins = "gpio41", "gpio42", "gpio43", "gpio44";
> +       cts-rts-pins {
> +               pins = "gpio41", "gpio42";
>                 function = "qup3";
>         };
>  };

FWIW, I would have expected that the SoC dtsi file would get a "4-pin"
definition (similar to what you did with qup_uart6_4pin) and then we'd
use that here.


>                         qup_uart6_4pin: qup-uart6-4pin-state {
> -
> -                               cts-pins {
> +                               qup_uart6_4pin_cts: cts-pins {
>                                         pins = "gpio45";
>                                         function = "qup6";
> -                                       bias-pull-down;

After your patch, where is the above bias set for cheza, db845c,
oneplus, shift-axolotl, ...?


>                                 };
>
> -                               rts-tx-pins {
> +                               qup_uart6_4pin_rts_tx: rts-tx-pins {
>                                         pins = "gpio46", "gpio47";
>                                         function = "qup6";
> -                                       drive-strength = <2>;
> -                                       bias-disable;

After your patch, where is the above bias / drive-strength set?


>                                 };
>
> -                               rx-pins {
> +                               qup_uart6_4pin_rx: rx-pins {
>                                         pins = "gpio48";
>                                         function = "qup6";
> -                                       bias-pull-up;

After your patch, where is the above bias set?

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