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Message-ID: <20221202163158.p7yuqimmnjbmlzvq@desk>
Date: Fri, 2 Dec 2022 08:31:58 -0800
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: Kim Phillips <kim.phillips@....com>
Cc: x86@...nel.org, Babu Moger <Babu.Moger@....com>,
Borislav Petkov <bp@...en8.de>, Borislav Petkov <bp@...e.de>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
Joao Martins <joao.m.martins@...cle.com>,
Jonathan Corbet <corbet@....net>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <seanjc@...gle.com>,
Thomas Gleixner <tglx@...utronix.de>,
David Woodhouse <dwmw@...zon.co.uk>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Juergen Gross <jgross@...e.com>,
Peter Zijlstra <peterz@...radead.org>,
Tony Luck <tony.luck@...el.com>,
Tom Lendacky <thomas.lendacky@....com>,
Alexey Kardashevskiy <aik@....com>, kvm@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 6/7] x86/cpu: Support AMD Automatic IBRS
On Wed, Nov 30, 2022 at 07:50:02PM -0600, Kim Phillips wrote:
>--- a/Documentation/admin-guide/kernel-parameters.txt
>+++ b/Documentation/admin-guide/kernel-parameters.txt
>@@ -5698,9 +5698,12 @@
> retpoline,generic - Retpolines
> retpoline,lfence - LFENCE; indirect branch
> retpoline,amd - alias for retpoline,lfence
>- eibrs - enhanced IBRS
>- eibrs,retpoline - enhanced IBRS + Retpolines
>- eibrs,lfence - enhanced IBRS + LFENCE
>+ eibrs - Enhanced/Auto IBRS
>+ autoibrs - Enhanced/Auto IBRS
>+ eibrs,retpoline - Enhanced/Auto IBRS + Retpolines
>+ autoibrs,retpoline- Enhanced/Auto IBRS + Retpolines
>+ eibrs,lfence - Enhanced/Auto IBRS + LFENCE
>+ autoibrs,lfence - Enhanced/Auto IBRS + LFENCE
> ibrs - use IBRS to protect kernel
Documentation/admin-guide/hw-vuln/spectre.rst also needs an update.
>--- a/arch/x86/kernel/cpu/common.c
>+++ b/arch/x86/kernel/cpu/common.c
>@@ -1226,7 +1226,7 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
> VULNWL_AMD(0x12, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
>
> /* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */
>- VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
>+ VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB),
> VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
I don't know if Hygon is ever going to get Automatic IBRS, but it
doesn't hurt to add NO_EIBRS_PBRSB to Hygon as well.
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