[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <6D3E7F39-086E-48C3-BB80-394CFBE8E682@linaro.org>
Date: Tue, 06 Dec 2022 00:46:12 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
martin.petersen@...cle.com, jejb@...ux.ibm.com,
andersson@...nel.org, vkoul@...nel.org
CC: quic_cang@...cinc.com, quic_asutoshd@...cinc.com,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org, linux-scsi@...r.kernel.org,
ahalaney@...hat.com, abel.vesa@...aro.org, alim.akhtar@...sung.com,
avri.altman@....com, bvanassche@....org
Subject: Re: [PATCH v4 02/23] phy: qcom-qmp-ufs: Rename MSM8996 PHY definitions
On 1 December 2022 20:43:07 GMT+03:00, Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org> wrote:
>Only MSM8996 is using "_ufs_" naming convention for PHY definitions instead
>of "_ufsphy_" as like other SoCs. So to maintain the uniformity, let's
>rename all of the definitions to use "_ufsphy_".
>
>Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>---
> drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
>diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
>index 20fcdbef8c77..35b77cd79e57 100644
>--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
>+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
>@@ -94,7 +94,7 @@ static const unsigned int sm8150_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = {
> [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V4_PCS_UFS_POWER_DOWN_CONTROL,
> };
>
>-static const struct qmp_phy_init_tbl msm8996_ufs_serdes[] = {
>+static const struct qmp_phy_init_tbl msm8996_ufsphy_serdes[] = {
> QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x0e),
> QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0xd7),
> QMP_PHY_INIT_CFG(QSERDES_COM_CLK_SELECT, 0x30),
>@@ -143,12 +143,12 @@ static const struct qmp_phy_init_tbl msm8996_ufs_serdes[] = {
> QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE1, 0x00),
> };
>
>-static const struct qmp_phy_init_tbl msm8996_ufs_tx[] = {
>+static const struct qmp_phy_init_tbl msm8996_ufsphy_tx[] = {
> QMP_PHY_INIT_CFG(QSERDES_TX_HIGHZ_TRANSCEIVEREN_BIAS_DRVR_EN, 0x45),
> QMP_PHY_INIT_CFG(QSERDES_TX_LANE_MODE, 0x02),
> };
>
>-static const struct qmp_phy_init_tbl msm8996_ufs_rx[] = {
>+static const struct qmp_phy_init_tbl msm8996_ufsphy_rx[] = {
> QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_LVL, 0x24),
> QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_CNTRL, 0x02),
> QMP_PHY_INIT_CFG(QSERDES_RX_RX_INTERFACE_MODE, 0x00),
>@@ -629,15 +629,15 @@ static const struct qmp_ufs_offsets qmp_ufs_offsets_v5 = {
> .rx2 = 0xa00,
> };
>
>-static const struct qmp_phy_cfg msm8996_ufs_cfg = {
>+static const struct qmp_phy_cfg msm8996_ufsphy_cfg = {
> .lanes = 1,
>
>- .serdes_tbl = msm8996_ufs_serdes,
>- .serdes_tbl_num = ARRAY_SIZE(msm8996_ufs_serdes),
>- .tx_tbl = msm8996_ufs_tx,
>- .tx_tbl_num = ARRAY_SIZE(msm8996_ufs_tx),
>- .rx_tbl = msm8996_ufs_rx,
>- .rx_tbl_num = ARRAY_SIZE(msm8996_ufs_rx),
>+ .serdes_tbl = msm8996_ufsphy_serdes,
>+ .serdes_tbl_num = ARRAY_SIZE(msm8996_ufsphy_serdes),
>+ .tx_tbl = msm8996_ufsphy_tx,
>+ .tx_tbl_num = ARRAY_SIZE(msm8996_ufsphy_tx),
>+ .rx_tbl = msm8996_ufsphy_rx,
>+ .rx_tbl_num = ARRAY_SIZE(msm8996_ufsphy_rx),
>
> .clk_list = msm8996_ufs_phy_clk_l,
> .num_clks = ARRAY_SIZE(msm8996_ufs_phy_clk_l),
>@@ -1156,7 +1156,7 @@ static int qmp_ufs_probe(struct platform_device *pdev)
> static const struct of_device_id qmp_ufs_of_match_table[] = {
> {
> .compatible = "qcom,msm8996-qmp-ufs-phy",
>- .data = &msm8996_ufs_cfg,
>+ .data = &msm8996_ufsphy_cfg,
> }, {
> .compatible = "qcom,msm8998-qmp-ufs-phy",
> .data = &sdm845_ufsphy_cfg,
--
With best wishes
Dmitry
Powered by blists - more mailing lists