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Message-ID: <Y42ucX8GwYEFVUcr@kadam>
Date: Mon, 5 Dec 2022 11:40:17 +0300
From: Dan Carpenter <error27@...il.com>
To: Akhil P Oommen <quic_akhilpo@...cinc.com>,
Jonathan Marek <jonathan@...ek.ca>
Cc: freedreno <freedreno@...ts.freedesktop.org>,
dri-devel@...ts.freedesktop.org, linux-arm-msm@...r.kernel.org,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Daniel Vetter <daniel@...ll.ch>,
David Airlie <airlied@...il.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Emma Anholt <emma@...olt.net>, Rob Clark <robdclark@...il.com>,
Sean Paul <sean@...rly.run>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/4] drm/msm/adreno: Fix null ptr access in
adreno_gpu_cleanup()
On Sun, Dec 04, 2022 at 04:11:41AM +0530, Akhil P Oommen wrote:
> Fix the below kernel panic due to null pointer access:
> [ 18.504431] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000048
> [ 18.513464] Mem abort info:
> [ 18.516346] ESR = 0x0000000096000005
> [ 18.520204] EC = 0x25: DABT (current EL), IL = 32 bits
> [ 18.525706] SET = 0, FnV = 0
> [ 18.528878] EA = 0, S1PTW = 0
> [ 18.532117] FSC = 0x05: level 1 translation fault
> [ 18.537138] Data abort info:
> [ 18.540110] ISV = 0, ISS = 0x00000005
> [ 18.544060] CM = 0, WnR = 0
> [ 18.547109] user pgtable: 4k pages, 39-bit VAs, pgdp=0000000112826000
> [ 18.553738] [0000000000000048] pgd=0000000000000000, p4d=0000000000000000, pud=0000000000000000
> [ 18.562690] Internal error: Oops: 0000000096000005 [#1] PREEMPT SMP
> **Snip**
> [ 18.696758] Call trace:
> [ 18.699278] adreno_gpu_cleanup+0x30/0x88
> [ 18.703396] a6xx_destroy+0xc0/0x130
> [ 18.707066] a6xx_gpu_init+0x308/0x424
Fixes: 17e822f7591f ("drm/msm: fix unbalanced pm_runtime_enable in adreno_gpu_{init, cleanup}")
Let's add Jonathan to the CC list so he can Ack your patch.
Although the real issue is that a6xx_gpu_init has bad error handling.
The a6xx_destroy() function supposed to free *everything* so then the
question becomes how do we avoid freeing something which was not
allocated? With normal kernel style we just free things one by one
in the reverse order from how they were allocated. See my blog for more
details:
https://staticthinking.wordpress.com/2022/04/28/free-the-last-thing-style/
However this code is written in One Function Frees Everything Style
which is difficult to review and prone to bugs. The common mistakes are
the kind of NULL dereference that you've seen, double frees, and missing
frees.
The only way to read this code is to open a new text editor window and
line up the allocations with the frees.
1725 static void a6xx_destroy(struct msm_gpu *gpu)
1726 {
1727 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
1728 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
1729
1730 if (a6xx_gpu->sqe_bo) {
1731 msm_gem_unpin_iova(a6xx_gpu->sqe_bo, gpu->aspace);
1732 drm_gem_object_put(a6xx_gpu->sqe_bo);
These unpin/put must be done together and should be in their own
function. The ->sqe_bo pointer is allocated in a6xx_ucode_init(). It's
assigned to an error pointer, but then set to NULL on error or after a
free. So this is okay.
1733 }
1734
1735 if (a6xx_gpu->shadow_bo) {
->shadow_bo is allocated in hw_init(). Should there be a call to
msm_gem_put_vaddr(a6xx_gpu->shadow)? It's unclear. [QUESTION #1]
1736 msm_gem_unpin_iova(a6xx_gpu->shadow_bo, gpu->aspace);
1737 drm_gem_object_put(a6xx_gpu->shadow_bo);
1738 }
1739
1740 a6xx_llc_slices_destroy(a6xx_gpu);
This has IS_ERR_OR_NULL() checks so it's okay.
1741
1742 a6xx_gmu_remove(a6xx_gpu);
This uses a gmu->initialized flag which allows it to safely clean up
everything. Fine.
1743
1744 adreno_gpu_cleanup(adreno_gpu);
This function has the bug that you identified. Let's dig into it.
(With normal kernel error handling you can read the error handling by
looking at the label name but with this style we need to jump around and
compare code from different files).
1745
1746 kfree(a6xx_gpu);
1747 }
drivers/gpu/drm/msm/adreno/adreno_gpu.c
1079 void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)
1080 {
1081 struct msm_gpu *gpu = &adreno_gpu->base;
1082 struct msm_drm_private *priv = gpu->dev->dev_private;
1083 unsigned int i;
1084
1085 for (i = 0; i < ARRAY_SIZE(adreno_gpu->info->fw); i++)
1086 release_firmware(adreno_gpu->fw[i]);
This is okay. ->fw[i] is either valid or NULL and releasing a NULL is
fine.
1087
1088 if (pm_runtime_enabled(&priv->gpu_pdev->dev))
This is the bug you found.
1089 pm_runtime_disable(&priv->gpu_pdev->dev);
1090
1091 msm_gpu_cleanup(&adreno_gpu->base);
Let's dig into msm_gpu_cleanup().
1092 }
drivers/gpu/drm/msm/msm_gpu.c
1006 void msm_gpu_cleanup(struct msm_gpu *gpu)
1007 {
1008 int i;
1009
1010 DBG("%s", gpu->name);
1011
1012 for (i = 0; i < ARRAY_SIZE(gpu->rb); i++) {
1013 msm_ringbuffer_destroy(gpu->rb[i]);
Destroying an error pointer is fine so this is okay.
1014 gpu->rb[i] = NULL;
1015 }
1016
1017 msm_gem_kernel_put(gpu->memptrs_bo, gpu->aspace);
^^^^^^^^^^^
[QUESTION #2] Passing an error pointer here will trigger a stack trace
so this is bug. The drivers->aspace pointer is allocted in
msm_gpu_create_private_address_space()
drivers/gpu/drm/msm/msm_gpu.c
824 struct msm_gem_address_space *
825 msm_gpu_create_private_address_space(struct msm_gpu *gpu, struct task_struct *task)
826 {
827 struct msm_gem_address_space *aspace = NULL;
828 if (!gpu)
829 return NULL;
830
831 /*
832 * If the target doesn't support private address spaces then return
833 * the global one
834 */
835 if (gpu->funcs->create_private_address_space) {
836 aspace = gpu->funcs->create_private_address_space(gpu);
837 if (!IS_ERR(aspace))
838 aspace->pid = get_pid(task_pid(task));
839 }
840
841 if (IS_ERR_OR_NULL(aspace))
^^^^^^^^^^^^^^^^^^^^^^
[QUESTION #3] This check seems reversed. It should be if *NOT* is error
or null.
842 aspace = msm_gem_address_space_get(gpu->aspace);
843
844 return aspace;
845 }
regards,
dan carpenter
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